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Rev 766 Rev 767
Line 249... Line 249...
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    __asm__ volatile("    ssub8 r0, r0, r4             \n"); // 1 cycle
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    __asm__ volatile("    ssub8 r0, r0, r4             \n"); // 1 cycle
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    __asm__ volatile("    sadd8 r1, r1, r5             \n"); // 1 cycle
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    __asm__ volatile("    sadd8 r1, r1, r5             \n"); // 1 cycle
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    __asm__ volatile("    qadd8 r0, r0, r1             \n"); // 1 cycle, r0 latency 2
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    __asm__ volatile("    qadd8 r0, r0, r1             \n"); // 1 cycle, r0 latency 2
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                                                             // bubble (due to r0 latency)
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                                                             // bubble (due to r0 latency)
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    __asm__ volatile("    sadd8 r0, r0, r4             \n"); // 1 cycle
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    __asm__ volatile("    sadd8 r0, r0, r4             \n"); // 1 cycle
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    __asm__ volatile("    str r0, [r9]                 \n"); // 1 cycle, 1 mem, r9 early
-
 
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    __asm__ volatile("    bic r2, r0, r6               \n"); // 1 cycle
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    __asm__ volatile("    bic r2, r0, r6               \n"); // 1 cycle
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    __asm__ volatile("    and r1, r6, r0,lsr#6         \n"); // 1 cycle, r0 early
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    __asm__ volatile("    and r1, r6, r0,lsr#6         \n"); // 1 cycle, r0 early
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    __asm__ volatile("    orr r2, r2, r1               \n"); // 1 cycle
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    __asm__ volatile("    orr r2, r2, r1               \n"); // 1 cycle
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    __asm__ volatile("    mov r1, r5                   \n"); // 1 cycle
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    __asm__ volatile("    mov r1, r5                   \n"); // 1 cycle
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    __asm__ volatile("    shsub8 r5, r0, r2            \n"); // 1 cycle
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    __asm__ volatile("    shsub8 r5, r0, r2            \n"); // 1 cycle
-
 
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    __asm__ volatile("    rev r0, r0                   \n"); // 1 cycle, r1 early
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    __asm__ volatile("    shadd8 r1, r1, r5            \n"); // 1 cycle
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    __asm__ volatile("    shadd8 r1, r1, r5            \n"); // 1 cycle
-
 
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    __asm__ volatile("    mov r0, r0, lsr#8            \n"); // 1 cycle, r1 early
-
 
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    __asm__ volatile("    str r0, [r9]                 \n"); // 1 cycle, 1 mem, r9 early
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    __asm__ volatile("    str r1, [r7], #4             \n"); // 1 cycle, 1 mem, r7 early
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    __asm__ volatile("    str r1, [r7], #4             \n"); // 1 cycle, 1 mem, r7 early
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
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    __asm__ volatile("    nop                          \n"); // 2 cycles
-
 
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    __asm__ volatile("    bne displaylcd_dither_x      \n");
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    __asm__ volatile("    bne displaylcd_dither_x      \n");
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    __asm__ volatile("    add r3, r3, r11              \n");
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    __asm__ volatile("    add r3, r3, r11              \n");
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    __asm__ volatile("    subs r12, r12, #1            \n");
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    __asm__ volatile("    subs r12, r12, #1            \n");
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    __asm__ volatile("    bne displaylcd_dither_y      \n");
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    __asm__ volatile("    bne displaylcd_dither_y      \n");
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    __asm__ volatile("displaylcd_dither_free:          \n");
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    __asm__ volatile("displaylcd_dither_free:          \n");