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Rev 704 Rev 732
Line 39... Line 39...
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	b	_start
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	b	_start
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 40 
 
41 
.section .initcode,"ax",%progbits
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.section .initcode,"ax",%progbits
42 
.global _start
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.global _start
43 
_start:
 43 
_start:
- 
 
 44 
	mrc	p15, 0, r0,c1,c0
- 
 
 45 
	bic	r0, r0, #0x200
- 
 
 46 
	orr	r0, r0, #0x100
- 
 
 47 
	mcr	p15, 0, r0,c1,c0
- 
 
 48 
	mov	r0, #0x7fffffff
- 
 
 49 
	mcr	p15, 0, r0,c3,c0
- 
 
 50 
	mov	r0, #0x22000000
- 
 
 51 
	orr	r1, r0, #0x00000100
- 
 
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	orr	r0, r0, #0x0003c000
- 
 
 53 
	orr	r1, r1, #0x000000fe
- 
 
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	add	r2, r0, #0x200
- 
 
 55 
	mov	r3, #0
- 
 
 56 
	str	r1, [r0], #4
- 
 
 57 
.mmuloop1:
- 
 
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	str	r3, [r0], #4
- 
 
 59 
	cmp	r0, r2
- 
 
 60 
	bne	.mmuloop1
44 
	ldr	r0, =0x00450878
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	add	r0, r0, #0x080
- 
 
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	add	r2, r0, #0x580
- 
 
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.mmuloop2:
- 
 
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	str	r3, [r0], #4
- 
 
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	cmp	r0, r2
- 
 
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	bne	.mmuloop2
- 
 
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	add	r0, r0, #0x4
- 
 
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	add	r2, r0, #0x7c
- 
 
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.mmuloop3:
- 
 
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	str	r3, [r0], #4
- 
 
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	cmp	r0, r2
- 
 
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	bne	.mmuloop3
- 
 
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	add	r0, r0, #0x4
- 
 
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	add	r2, r0, #0x500
- 
 
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	add	r2, r2, #0x7c
- 
 
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.mmuloop4:
- 
 
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	str	r3, [r0], #4
- 
 
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	cmp	r0, r2
- 
 
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	bne	.mmuloop4
- 
 
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	add	r0, r0, #0x200
- 
 
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	add	r2, r0, #0x3000
- 
 
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.mmuloop5:
- 
 
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	str	r3, [r0], #4
- 
 
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	cmp	r0, r2
- 
 
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	bne	.mmuloop5
- 
 
 86 
	mrc	p15, 0, r0,c1,c0
- 
 
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	orr	r0, r0, #5
45 
	mcr	p15, 0, r0,c1,c0,0
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	mcr	p15, 0, r0,c1,c0
46 
	ldr	r0, =_sramsource
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	ldr	r0, =_sramsource
47 
	ldr	r1, =_sramstart
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	ldr	r1, =_sramstart
48 
	ldr	r2, =_sramend
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	ldr	r2, =_sramend
49 
.copysram:
 92 
.copysram:
50 
	cmp	r2, r1
 93 
	cmp	r2, r1
Line 70... Line 113...
70 
	ldr	r1, =_bssend
 113 
	ldr	r1, =_bssend
71 
.clearbss:
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.clearbss:
72 
	cmp	r1, r0
 115 
	cmp	r1, r0
73 
	strhi	r2, [r0], #4
 116 
	strhi	r2, [r0], #4
74 
	bhi	.clearbss
 117 
	bhi	.clearbss
75 
	ldr	r1, =0x38200000
 - 
 
76 
	ldr	r0, [r1]
 - 
 
77 
	orr	r0, r0, #1
 - 
 
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	bic	r0, r0, #0x10000
 - 
 
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	str	r0, [r1]
 - 
 
80 
	mov	r0, #0
 118 
	mov	r0, #0
81 
	mcr	p15, 0, r0,c7,c5,0
 119 
	mcr	p15, 0, r0,c7,c10,0 @ clean data cache
- 
 
 120 
	mcr	p15, 0, r0,c7,c10,4 @ drain write buffer
- 
 
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	mcr	p15, 0, r0,c7,c5,0  @ invalidate instruction cache
- 
 
 122 
	mcr	p15, 0, r0,c7,c5,4  @ flush prefetch buffer
82 
	add	r1, r1, #0x00c00000
 123 
	ldr	r1, =0x38e00000
83 
	add	r2, r1, #0x00001000
 124 
	add	r2, r1, #0x00001000
84 
	add	r3, r1, #0x00002000
 125 
	add	r3, r1, #0x00002000
85 
	sub	r4, r0, #1
 126 
	mov	r4, #-1
86 
	str	r4, [r1,#0x14]
 127 
	str	r4, [r1,#0x14]
87 
	str	r4, [r2,#0x14]
 128 
	str	r4, [r2,#0x14]
88 
	str	r4, [r1,#0xf00]
 129 
	str	r4, [r1,#0xf00]
89 
	str	r4, [r2,#0xf00]
 130 
	str	r4, [r2,#0xf00]
90 
	str	r4, [r3,#0x08]
 131 
	str	r4, [r3,#0x08]
91 
	str	r4, [r3,#0x0c]
 132 
	str	r4, [r3,#0x0c]
92 
	str	r0, [r1,#0x14]
 - 
 
93 
	str	r0, [r2,#0x14]
 - 
 
94 
	mov	r0, #0
 - 
 
95 
	ldr	r1, =0x3c500000
 - 
 
96 
	str	r0, [r1,#0x48]
 - 
 
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	str	r0, [r1,#0x4c]
 - 
 
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	msr	cpsr_c, #0xd2
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	msr	cpsr_c, #0xd2
99 
	ldr	sp, =_irqstackend
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	ldr	sp, =_irqstackend
100 
	msr	cpsr_c, #0xd7
 135 
	msr	cpsr_c, #0xd7
101 
	ldr	sp, =_abortstackend
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	ldr	sp, =_abortstackend
102 
	msr	cpsr_c, #0xdb
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	msr	cpsr_c, #0xdb
Line 125... Line 160...
125 
	mov	r0, #0x100000
 160 
	mov	r0, #0x100000
126 
	mov	r1, #0x3c800000
 161 
	mov	r1, #0x3c800000
127 
	str	r0, [r1]
 162 
	str	r0, [r1]
128 
hang:
 163 
hang:
129 
	msr	cpsr_c, #0xd3
 164 
	msr	cpsr_c, #0xd3
- 
 
 165 
	mov	r0, #0
130 
	mcr	p15, 0, r0,c7,c0,4
 166 
	mcr	p15, 0, r0,c7,c0,4
131 
	b	hang
 167 
	b	hang
132 
.size reset, .-reset
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.size reset, .-reset
133 
.size hang, .-hang
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.size hang, .-hang
134 
 
 170 
 
Line 190... Line 226...
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	msr	cpsr_c, r4
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	msr	cpsr_c, r4
191 
	stmia	sp!, {r0-r3}
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	stmia	sp!, {r0-r3}
192 
	sub	sp, sp, #0x44
 228 
	sub	sp, sp, #0x44
193 
	mov	r0, #0
 229 
	mov	r0, #0
194 
	adr	r1, prefetch_abort_text
 230 
	adr	r1, prefetch_abort_text
195 
	mrc	p15, 0, r3,c5,c0,1
 231 
	mrc	p15, 0, r3,c5,c0
196 
	mov	r4, r3,lsr#4
 232 
	mov	r4, r3,lsr#4
197 
	and	r4, r4, #0xf
 233 
	and	r4, r4, #0xf
198 
	and	r5, r3, #0xf
 234 
	and	r5, r3, #0xf
199 
	stmfd	sp!, {r4-r5}
 235 
	stmfd	sp!, {r4-r5}
200 
	b	panicf
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	b	panicf
Line 290... Line 326...
290 
 
 326 
 
291 
.global read_usec_timer
 327 
.global read_usec_timer
292 
.type read_usec_timer, %function
 328 
.type read_usec_timer, %function
293 
read_usec_timer:
 329 
read_usec_timer:
294 
	ldr	r0, val_3c700000
 330 
	ldr	r0, val_3c700000
295 
	ldr	r1, [r0,#0x80]
 - 
 
296 
	ldr	r0, [r0,#0x84]
 331 
	ldr	r0, [r0,#0xb4]
297 
	mov	r0, r0,lsr#5
 - 
 
298 
	orr	r0, r0, r1,lsl#27
 - 
 
299 
	add	r0, r0, r0,asr#2
 - 
 
300 
	add	r0, r0, r0,asr#6
 - 
 
301 
	bx	lr
 332 
	bx	lr
302 
.size read_usec_timer, .-read_usec_timer
 333 
.size read_usec_timer, .-read_usec_timer
303 
 
 334 
 
304 
val_3c700000:
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val_3c700000:
305 
	.word	0x3c700000
 336 
	.word	0x3c700000