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Rev 629 Rev 796
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{
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{
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    VIC0INTENABLE = 1 << IRQ_TIMER;
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    VIC0INTENABLE = 1 << IRQ_TIMER;
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    VIC0INTENABLE = 1 << IRQ_DMAC0;
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    VIC0INTENABLE = 1 << IRQ_DMAC0;
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    VIC0INTENABLE = 1 << IRQ_DMAC1;
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    VIC0INTENABLE = 1 << IRQ_DMAC1;
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#ifdef TARGET_ipodclassic
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#ifdef TARGET_ipodclassic
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    clockgate_enable(5, true);
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    ATA_IRQ_MASK = 0;
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    ATA_IRQ = ATA_IRQ;
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    ATA_CONTROL = 0;
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    while (!(ATA_CONTROL & BIT(1))) yield();
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    clockgate_enable(5, false);
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    VIC0INTENABLE = 1 << IRQ_ATA;
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    VIC0INTENABLE = 1 << IRQ_ATA;
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    VIC1INTENABLE = 1 << (IRQ_MMC - 32);
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    VIC1INTENABLE = 1 << (IRQ_MMC - 32);
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#endif
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#endif
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}
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}
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