| Line 92... |
Line 92... |
| 92 |
default_interrupt(INT_IRQ39);
|
92 |
default_interrupt(INT_IRQ39);
|
| 93 |
default_interrupt(INT_IRQ40);
|
93 |
default_interrupt(INT_IRQ40);
|
| 94 |
default_interrupt(INT_IRQ41);
|
94 |
default_interrupt(INT_IRQ41);
|
| 95 |
default_interrupt(INT_IRQ42);
|
95 |
default_interrupt(INT_IRQ42);
|
| 96 |
default_interrupt(INT_IRQ43);
|
96 |
default_interrupt(INT_IRQ43);
|
| 97 |
default_interrupt(INT_IRQ44);
|
97 |
default_interrupt(INT_MMC);
|
| 98 |
default_interrupt(INT_IRQ45);
|
98 |
default_interrupt(INT_IRQ45);
|
| 99 |
default_interrupt(INT_IRQ46);
|
99 |
default_interrupt(INT_IRQ46);
|
| 100 |
default_interrupt(INT_IRQ47);
|
100 |
default_interrupt(INT_IRQ47);
|
| 101 |
default_interrupt(INT_IRQ48);
|
101 |
default_interrupt(INT_IRQ48);
|
| 102 |
default_interrupt(INT_IRQ49);
|
102 |
default_interrupt(INT_IRQ49);
|
| Line 184... |
Line 184... |
| 184 |
INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
|
184 |
INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
|
| 185 |
INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
|
185 |
INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
|
| 186 |
INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL,
|
186 |
INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL,
|
| 187 |
INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
|
187 |
INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
|
| 188 |
INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
|
188 |
INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
|
| 189 |
INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
|
189 |
INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_MMC,INT_IRQ45,INT_IRQ46,INT_IRQ47,
|
| 190 |
INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
|
190 |
INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
|
| 191 |
INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
|
191 |
INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
|
| 192 |
};
|
192 |
};
|
| 193 |
|
193 |
|
| 194 |
void irqhandler(void)
|
194 |
void irqhandler(void)
|
| Line 236... |
Line 236... |
| 236 |
VIC0INTENABLE = 1 << IRQ_TIMER;
|
236 |
VIC0INTENABLE = 1 << IRQ_TIMER;
|
| 237 |
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
237 |
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
| 238 |
VIC0INTENABLE = 1 << IRQ_DMAC1;
|
238 |
VIC0INTENABLE = 1 << IRQ_DMAC1;
|
| 239 |
#ifdef TARGET_ipodclassic
|
239 |
#ifdef TARGET_ipodclassic
|
| 240 |
VIC0INTENABLE = 1 << IRQ_ATA;
|
240 |
VIC0INTENABLE = 1 << IRQ_ATA;
|
| - |
|
241 |
VIC1INTENABLE = 1 << (IRQ_MMC - 32);
|
| 241 |
#endif
|
242 |
#endif
|
| 242 |
}
|
243 |
}
|
| 243 |
|
244 |
|
| 244 |
void interrupt_shutdown(void)
|
245 |
void interrupt_shutdown(void)
|
| 245 |
{
|
246 |
{
|