Subversion Repositories freemyipod

Rev

Rev 85 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 85 Rev 87
Line 25... Line 25...
25 
#define __S5L8720_H__
 25 
#define __S5L8720_H__
26 
 
 26 
 
27 
#include "global.h"
 27 
#include "global.h"
28 
 
 28 
 
29 
 
 29 
 
30 
/////CLKCON/////
 30 
/////SYSCON/////
31 
#define CLKCON       (*((volatile uint32_t*)(0x3C500000)))
 - 
 
32 
#define PLL0PMS      (*((volatile uint32_t*)(0x3C500004)))
 - 
 
33 
#define PLL1PMS      (*((volatile uint32_t*)(0x3C500008)))
 - 
 
34 
#define PLL2PMS      (*((volatile uint32_t*)(0x3C50000C)))
 - 
 
35 
#define PLL0LCNT     (*((volatile uint32_t*)(0x3C500014)))
 - 
 
36 
#define PLL1LCNT     (*((volatile uint32_t*)(0x3C500018)))
 - 
 
37 
#define PLL2LCNT     (*((volatile uint32_t*)(0x3C50001C)))
 - 
 
38 
#define PLLLOCK      (*((volatile uint32_t*)(0x3C500020)))
 - 
 
39 
#define PLLCON       (*((volatile uint32_t*)(0x3C500024)))
 - 
 
40 
#define PWRCON       (*((volatile uint32_t*)(0x3C500028)))
 - 
 
41 
#define PWRMODE      (*((volatile uint32_t*)(0x3C50002C)))
 - 
 
42 
#define SWRCON       (*((volatile uint32_t*)(0x3C500030)))
 - 
 
43 
#define RSTSR        (*((volatile uint32_t*)(0x3C500034)))
 - 
 
44 
#define DSPCLKMD     (*((volatile uint32_t*)(0x3C500038)))
 - 
 
45 
#define CLKCON2      (*((volatile uint32_t*)(0x3C50003C)))
 - 
 
46 
#define PWRCONEXT    (*((volatile uint32_t*)(0x3C500040)))
 31 
#define PWRCON(i)    (*((volatile uint32_t*)(0x3C500000 \
47 
 
 - 
 
48 
 
 - 
 
49 
/////GPIO/////
 - 
 
50 
#define PCON0        (*((volatile uint32_t*)(0x3CF00000)))
 - 
 
51 
#define PDAT0        (*((volatile uint32_t*)(0x3CF00004)))
 - 
 
52 
#define PCON1        (*((volatile uint32_t*)(0x3CF00010)))
 - 
 
53 
#define PDAT1        (*((volatile uint32_t*)(0x3CF00014)))
 - 
 
54 
#define PCON2        (*((volatile uint32_t*)(0x3CF00020)))
 - 
 
55 
#define PDAT2        (*((volatile uint32_t*)(0x3CF00024)))
 - 
 
56 
#define PCON3        (*((volatile uint32_t*)(0x3CF00030)))
 - 
 
57 
#define PDAT3        (*((volatile uint32_t*)(0x3CF00034)))
 - 
 
58 
#define PCON4        (*((volatile uint32_t*)(0x3CF00040)))
 - 
 
59 
#define PDAT4        (*((volatile uint32_t*)(0x3CF00044)))
 - 
 
60 
#define PCON5        (*((volatile uint32_t*)(0x3CF00050)))
 - 
 
61 
#define PDAT5        (*((volatile uint32_t*)(0x3CF00054)))
 - 
 
62 
#define PUNK5        (*((volatile uint32_t*)(0x3CF0005C)))
 - 
 
63 
#define PCON6        (*((volatile uint32_t*)(0x3CF00060)))
 32 
                                           + ((i) == 4 ? 0x6C : \
64 
#define PDAT6        (*((volatile uint32_t*)(0x3CF00064)))
 33 
                                             ((i) == 3 ? 0x68 : \
65 
#define PCON7        (*((volatile uint32_t*)(0x3CF00070)))
 - 
 
66 
#define PDAT7        (*((volatile uint32_t*)(0x3CF00074)))
 - 
 
67 
#define PCON10       (*((volatile uint32_t*)(0x3CF000A0)))
 - 
 
68 
#define PDAT10       (*((volatile uint32_t*)(0x3CF000A4)))
 - 
 
69 
#define PCON11       (*((volatile uint32_t*)(0x3CF000B0)))
 - 
 
70 
#define PDAT11       (*((volatile uint32_t*)(0x3CF000B4)))
 - 
 
71 
#define PCON15       (*((volatile uint32_t*)(0x3CF000F0)))
 - 
 
72 
#define PUNK15       (*((volatile uint32_t*)(0x3CF000FC)))
 - 
 
73 
 
 - 
 
74 
 
 - 
 
75 
/////IODMA/////
 - 
 
76 
#define DMABASE0     (*((volatile uint32_t*)(0x38400000)))
 - 
 
77 
#define DMACON0      (*((volatile uint32_t*)(0x38400004)))
 - 
 
78 
#define DMATCNT0     (*((volatile uint32_t*)(0x38400008)))
 - 
 
79 
#define DMACADDR0    (*((volatile uint32_t*)(0x3840000C)))
 - 
 
80 
#define DMACTCNT0    (*((volatile uint32_t*)(0x38400010)))
 - 
 
81 
#define DMACOM0      (*((volatile uint32_t*)(0x38400014)))
 - 
 
82 
#define DMANOF0      (*((volatile uint32_t*)(0x38400018)))
 - 
 
83 
#define DMABASE1     (*((volatile uint32_t*)(0x38400020)))
 - 
 
84 
#define DMACON1      (*((volatile uint32_t*)(0x38400024)))
 - 
 
85 
#define DMATCNT1     (*((volatile uint32_t*)(0x38400028)))
 - 
 
86 
#define DMACADDR1    (*((volatile uint32_t*)(0x3840002C)))
 - 
 
87 
#define DMACTCNT1    (*((volatile uint32_t*)(0x38400030)))
 - 
 
88 
#define DMACOM1      (*((volatile uint32_t*)(0x38400034)))
 - 
 
89 
#define DMABASE2     (*((volatile uint32_t*)(0x38400040)))
 - 
 
90 
#define DMACON2      (*((volatile uint32_t*)(0x38400044)))
 - 
 
91 
#define DMATCNT2     (*((volatile uint32_t*)(0x38400048)))
 - 
 
92 
#define DMACADDR2    (*((volatile uint32_t*)(0x3840004C)))
 - 
 
93 
#define DMACTCNT2    (*((volatile uint32_t*)(0x38400050)))
 - 
 
94 
#define DMACOM2      (*((volatile uint32_t*)(0x38400054)))
 - 
 
95 
#define DMABASE3     (*((volatile uint32_t*)(0x38400060)))
 - 
 
96 
#define DMACON3      (*((volatile uint32_t*)(0x38400064)))
 - 
 
97 
#define DMATCNT3     (*((volatile uint32_t*)(0x38400068)))
 - 
 
98 
#define DMACADDR3    (*((volatile uint32_t*)(0x3840006C)))
 - 
 
99 
#define DMACTCNT3    (*((volatile uint32_t*)(0x38400070)))
 - 
 
100 
#define DMACOM3      (*((volatile uint32_t*)(0x38400074)))
 - 
 
101 
#define DMABASE4     (*((volatile uint32_t*)(0x38400080)))
 - 
 
102 
#define DMACON4      (*((volatile uint32_t*)(0x38400084)))
 - 
 
103 
#define DMATCNT4     (*((volatile uint32_t*)(0x38400088)))
 - 
 
104 
#define DMACADDR4    (*((volatile uint32_t*)(0x3840008C)))
 - 
 
105 
#define DMACTCNT4    (*((volatile uint32_t*)(0x38400090)))
 - 
 
106 
#define DMACOM4      (*((volatile uint32_t*)(0x38400094)))
 - 
 
107 
#define DMABASE5     (*((volatile uint32_t*)(0x384000A0)))
 - 
 
108 
#define DMACON5      (*((volatile uint32_t*)(0x384000A4)))
 - 
 
109 
#define DMATCNT5     (*((volatile uint32_t*)(0x384000A8)))
 - 
 
110 
#define DMACADDR5    (*((volatile uint32_t*)(0x384000AC)))
 - 
 
111 
#define DMACTCNT5    (*((volatile uint32_t*)(0x384000B0)))
 - 
 
112 
#define DMACOM5      (*((volatile uint32_t*)(0x384000B4)))
 - 
 
113 
#define DMABASE6     (*((volatile uint32_t*)(0x384000C0)))
 - 
 
114 
#define DMACON6      (*((volatile uint32_t*)(0x384000C4)))
 - 
 
115 
#define DMATCNT6     (*((volatile uint32_t*)(0x384000C8)))
 - 
 
116 
#define DMACADDR6    (*((volatile uint32_t*)(0x384000CC)))
 - 
 
117 
#define DMACTCNT6    (*((volatile uint32_t*)(0x384000D0)))
 - 
 
118 
#define DMACOM6      (*((volatile uint32_t*)(0x384000D4)))
 - 
 
119 
#define DMABASE7     (*((volatile uint32_t*)(0x384000E0)))
 - 
 
120 
#define DMACON7      (*((volatile uint32_t*)(0x384000E4)))
 - 
 
121 
#define DMATCNT7     (*((volatile uint32_t*)(0x384000E8)))
 - 
 
122 
#define DMACADDR7    (*((volatile uint32_t*)(0x384000EC)))
 - 
 
123 
#define DMACTCNT7    (*((volatile uint32_t*)(0x384000F0)))
 - 
 
124 
#define DMACOM7      (*((volatile uint32_t*)(0x384000F4)))
 - 
 
125 
#define DMABASE8     (*((volatile uint32_t*)(0x38400100)))
 - 
 
126 
#define DMACON8      (*((volatile uint32_t*)(0x38400104)))
 - 
 
127 
#define DMATCNT8     (*((volatile uint32_t*)(0x38400108)))
 - 
 
128 
#define DMACADDR8    (*((volatile uint32_t*)(0x3840010C)))
 - 
 
129 
#define DMACTCNT8    (*((volatile uint32_t*)(0x38400110)))
 - 
 
130 
#define DMACOM8      (*((volatile uint32_t*)(0x38400114)))
 - 
 
131 
#define DMAALLST     (*((volatile uint32_t*)(0x38400180)))
 - 
 
132 
#define DMAALLST2    (*((volatile uint32_t*)(0x38400184)))
 - 
 
133 
#define DMACON_DEVICE_SHIFT    30
 - 
 
134 
#define DMACON_DIRECTION_SHIFT 29
 - 
 
135 
#define DMACON_DATA_SIZE_SHIFT 22
 - 
 
136 
#define DMACON_BURST_LEN_SHIFT 19
 - 
 
137 
#define DMACOM_START           4
 - 
 
138 
#define DMACOM_CLEARBOTHDONE   7
 - 
 
139 
#define DMAALLST_WCOM0         (1 << 0)
 - 
 
140 
#define DMAALLST_HCOM0         (1 << 1)
 - 
 
141 
#define DMAALLST_DMABUSY0      (1 << 2)
 - 
 
142 
#define DMAALLST_HOLD_SKIP     (1 << 3)
 - 
 
143 
#define DMAALLST_WCOM1         (1 << 4)
 - 
 
144 
#define DMAALLST_HCOM1         (1 << 5)
 - 
 
145 
#define DMAALLST_DMABUSY1      (1 << 6)
 - 
 
146 
#define DMAALLST_WCOM2         (1 << 8)
 - 
 
147 
#define DMAALLST_HCOM2         (1 << 9)
 - 
 
148 
#define DMAALLST_DMABUSY2      (1 << 10)
 - 
 
149 
#define DMAALLST_WCOM3         (1 << 12)
 - 
 
150 
#define DMAALLST_HCOM3         (1 << 13)
 - 
 
151 
#define DMAALLST_DMABUSY3      (1 << 14)
 - 
 
152 
#define DMAALLST_CHAN0_MASK    (0xF << 0)
 - 
 
153 
#define DMAALLST_CHAN1_MASK    (0xF << 4)
 - 
 
154 
#define DMAALLST_CHAN2_MASK    (0xF << 8)
 - 
 
155 
#define DMAALLST_CHAN3_MASK    (0xF << 12)
 - 
 
156 
 
 - 
 
157 
 
 - 
 
158 
/////FMC/////
 - 
 
159 
#define FMCTRL0      (*((volatile uint32_t*)(0x39400000)))
 - 
 
160 
#define FMCTRL1      (*((volatile uint32_t*)(0x39400004)))
 - 
 
161 
#define FMCMD        (*((volatile uint32_t*)(0x39400008)))
 34 
                                             ((i) == 2 ? 0x58 : \
162 
#define FMADDR0      (*((volatile uint32_t*)(0x3940000C)))
 - 
 
163 
#define FMADDR1      (*((volatile uint32_t*)(0x39400010)))
 - 
 
164 
#define FMANUM       (*((volatile uint32_t*)(0x3940002C)))
 - 
 
165 
#define FMDNUM       (*((volatile uint32_t*)(0x39400030)))
 - 
 
166 
#define FMCSTAT      (*((volatile uint32_t*)(0x39400048)))
 - 
 
167 
#define FMFIFO       (*((volatile uint32_t*)(0x39400080)))
 - 
 
168 
#define RS_ECC_CTRL  (*((volatile uint32_t*)(0x39400100)))
 - 
 
169 
#define FMCTRL0_ENABLEDMA      (1 << 10)
 - 
 
170 
#define FMCTRL0_UNK1           (1 << 11)
 - 
 
171 
#define FMCTRL1_DOTRANSADDR    (1 << 0)
 - 
 
172 
#define FMCTRL1_DOREADDATA     (1 << 1)
 - 
 
173 
#define FMCTRL1_DOWRITEDATA    (1 << 2)
 - 
 
174 
#define FMCTRL1_CLEARWFIFO     (1 << 6)
 - 
 
175 
#define FMCTRL1_CLEARRFIFO     (1 << 7)
 - 
 
176 
#define FMCSTAT_RBB            (1 << 0)
 - 
 
177 
#define FMCSTAT_RBBDONE        (1 << 1)
 - 
 
178 
#define FMCSTAT_CMDDONE        (1 << 2)
 - 
 
179 
#define FMCSTAT_ADDRDONE       (1 << 3)
 - 
 
180 
#define FMCSTAT_BANK0READY     (1 << 4)
 - 
 
181 
#define FMCSTAT_BANK1READY     (1 << 5)
 - 
 
182 
#define FMCSTAT_BANK2READY     (1 << 6)
 - 
 
183 
#define FMCSTAT_BANK3READY     (1 << 7)
 - 
 
184 
 
 - 
 
185 
 
 - 
 
186 
/////ECC/////
 - 
 
187 
#define ECC_DATA_PTR  (*((volatile uint32_t*)(0x39E00004)))
 - 
 
188 
#define ECC_SPARE_PTR (*((volatile uint32_t*)(0x39E00008)))
 - 
 
189 
#define ECC_CTRL      (*((volatile uint32_t*)(0x39E0000C)))
 - 
 
190 
#define ECC_RESULT    (*((volatile uint32_t*)(0x39E00010)))
 - 
 
191 
#define ECC_UNK1      (*((volatile uint32_t*)(0x39E00014)))
 - 
 
192 
#define ECC_INT_CLR   (*((volatile uint32_t*)(0x39E00040)))
 - 
 
193 
#define ECCCTRL_STARTDECODING  (1 << 0)
 - 
 
194 
#define ECCCTRL_STARTENCODING  (1 << 1)
 - 
 
195 
#define ECCCTRL_STARTDECNOSYND (1 << 2)
 - 
 
196 
 
 - 
 
197 
 
 - 
 
198 
/////CLICKWHEEL/////
 - 
 
199 
#define WHEEL00      (*((volatile uint32_t*)(0x3C200000)))
 - 
 
200 
#define WHEEL04      (*((volatile uint32_t*)(0x3C200004)))
 - 
 
201 
#define WHEEL08      (*((volatile uint32_t*)(0x3C200008)))
 - 
 
202 
#define WHEEL0C      (*((volatile uint32_t*)(0x3C20000C)))
 - 
 
203 
#define WHEEL10      (*((volatile uint32_t*)(0x3C200010)))
 - 
 
204 
#define WHEELINT     (*((volatile uint32_t*)(0x3C200014)))
 - 
 
205 
#define WHEELRX      (*((volatile uint32_t*)(0x3C200018)))
 - 
 
206 
#define WHEELTX      (*((volatile uint32_t*)(0x3C20001C)))
 - 
 
207 
 
 - 
 
208 
 
 - 
 
209 
/////AES/////
 - 
 
210 
#define AESCONTROL   (*((volatile uint32_t*)(0x39800000)))
 - 
 
211 
#define AESGO        (*((volatile uint32_t*)(0x39800004)))
 - 
 
212 
#define AESUNKREG0   (*((volatile uint32_t*)(0x39800008)))
 - 
 
213 
#define AESSTATUS    (*((volatile uint32_t*)(0x3980000C)))
 - 
 
214 
#define AESUNKREG1   (*((volatile uint32_t*)(0x39800010)))
 - 
 
215 
#define AESKEYLEN    (*((volatile uint32_t*)(0x39800014)))
 - 
 
216 
#define AESOUTSIZE   (*((volatile uint32_t*)(0x39800018)))
 - 
 
217 
#define AESOUTADDR   (*((volatile uint32_t*)(0x39800020)))
 - 
 
218 
#define AESINSIZE    (*((volatile uint32_t*)(0x39800024)))
 - 
 
219 
#define AESINADDR    (*((volatile uint32_t*)(0x39800028)))
 - 
 
220 
#define AESAUXSIZE   (*((volatile uint32_t*)(0x3980002C)))
 - 
 
221 
#define AESAUXADDR   (*((volatile uint32_t*)(0x39800030)))
 - 
 
222 
#define AESSIZE3     (*((volatile uint32_t*)(0x39800034)))
 - 
 
223 
#define AESKEY         ((volatile uint32_t*)(0x3980004C))
 35 
                                             ((i) == 1 ? 0x4C : \
224 
#define AESTYPE      (*((volatile uint32_t*)(0x3980006C)))
 - 
 
225 
#define AESIV          ((volatile uint32_t*)(0x39800074))
 36 
                                                         0x48)))))))
226 
#define AESTYPE2     (*((volatile uint32_t*)(0x39800088)))
 - 
 
227 
#define AESUNKREG2   (*((volatile uint32_t*)(0x3980008C)))
 - 
 
228 
 
 - 
 
229 
/////HASH/////
 - 
 
230 
#define HASHCTRL     (*((volatile uint32_t*)(0x3C600000)))
 - 
 
231 
#define HASHRESULT     ((volatile uint32_t*)(0x3C600020))
 - 
 
232 
#define HASHDATAIN     ((volatile uint32_t*)(0x3C600040))
 - 
 
233 
 
 37 
 
234 
 
 38 
 
235 
/////TIMER/////
 39 
/////TIMER/////
236 
#define TACON        (*((volatile uint32_t*)(0x3C700000)))
 40 
#define TACON        (*((volatile uint32_t*)(0x3C700000)))
237 
#define TACMD        (*((volatile uint32_t*)(0x3C700004)))
 41 
#define TACMD        (*((volatile uint32_t*)(0x3C700004)))
Line 289... Line 93...
289 
#define OTGBASE 0x38400000
 93 
#define OTGBASE 0x38400000
290 
#define PHYBASE 0x3C400000
 94 
#define PHYBASE 0x3C400000
291 
 
 95 
 
292 
 
 96 
 
293 
/////I2C/////
 97 
/////I2C/////
294 
#define IICCON       (*((volatile uint32_t*)(0x3C900000)))
 98 
#define IICCON(bus)  (*((volatile uint32_t*)(0x3C600000 + 0x300000 * (bus))))
295 
#define IICSTAT      (*((volatile uint32_t*)(0x3C900004)))
 99 
#define IICSTAT(bus) (*((volatile uint32_t*)(0x3C600004 + 0x300000 * (bus))))
296 
#define IICADD       (*((volatile uint32_t*)(0x3C900008)))
 100 
#define IICADD(bus)  (*((volatile uint32_t*)(0x3C600008 + 0x300000 * (bus))))
297 
#define IICDS        (*((volatile uint32_t*)(0x3C90000C)))
 101 
#define IICDS(bus)   (*((volatile uint32_t*)(0x3C60000C + 0x300000 * (bus))))
298 
 
 102 
 
299 
 
 103 
 
300 
/////INTERRUPTS/////
 104 
/////INTERRUPTS/////
301 
#define VICIRQSTATUS(v)       (*((volatile uint32_t*)(0x38E00000 + 0x1000 * (v))))
 105 
#define VICIRQSTATUS(v)       (*((volatile uint32_t*)(0x38E00000 + 0x1000 * (v))))
302 
#define VICFIQSTATUS(v)       (*((volatile uint32_t*)(0x38E00004 + 0x1000 * (v))))
 106 
#define VICFIQSTATUS(v)       (*((volatile uint32_t*)(0x38E00004 + 0x1000 * (v))))
Line 466... Line 270...
466 
#define VIC1VECTPRIORITY28    (*((volatile uint32_t*)(0x38E01270)))
 270 
#define VIC1VECTPRIORITY28    (*((volatile uint32_t*)(0x38E01270)))
467 
#define VIC1VECTPRIORITY29    (*((volatile uint32_t*)(0x38E01274)))
 271 
#define VIC1VECTPRIORITY29    (*((volatile uint32_t*)(0x38E01274)))
468 
#define VIC1VECTPRIORITY30    (*((volatile uint32_t*)(0x38E01278)))
 272 
#define VIC1VECTPRIORITY30    (*((volatile uint32_t*)(0x38E01278)))
469 
#define VIC1VECTPRIORITY31    (*((volatile uint32_t*)(0x38E0127C)))
 273 
#define VIC1VECTPRIORITY31    (*((volatile uint32_t*)(0x38E0127C)))
470 
#define VIC1ADDRESS           (*((volatile uint32_t*)(0x38E01F00)))
 274 
#define VIC1ADDRESS           (*((volatile uint32_t*)(0x38E01F00)))
- 
 
 275 
 
- 
 
 276 
 
- 
 
 277 
/////CLOCK GATES/////
- 
 
 278 
#define CLOCKGATE_USB_1 2
- 
 
 279 
#define CLOCKGATE_USB_2 35
- 
 
 280 
 
- 
 
 281 
 
- 
 
 282 
/////INTERRUPTS/////
471 
#define IRQ_TIMER 8
 283 
#define IRQ_TIMER 8
472 
#define IRQ_USB_FUNC 19
 284 
#define IRQ_USB_FUNC 19
473 
#define IRQ_IIC 0
 - 
 
474 
 
 285 
 
475 
 
 286 
 
476 
#endif
 287 
#endif