| Line 76... |
Line 76... |
| 76 |
default_interrupt(INT_IRQ24);
|
76 |
default_interrupt(INT_IRQ24);
|
| 77 |
default_interrupt(INT_IRQ25);
|
77 |
default_interrupt(INT_IRQ25);
|
| 78 |
default_interrupt(INT_IRQ26);
|
78 |
default_interrupt(INT_IRQ26);
|
| 79 |
default_interrupt(INT_IRQ27);
|
79 |
default_interrupt(INT_IRQ27);
|
| 80 |
default_interrupt(INT_IRQ28);
|
80 |
default_interrupt(INT_IRQ28);
|
| 81 |
default_interrupt(INT_IRQ29);
|
81 |
default_interrupt(INT_ATA);
|
| 82 |
default_interrupt(INT_IRQ30);
|
82 |
default_interrupt(INT_IRQ30);
|
| 83 |
default_interrupt(INT_IRQ31);
|
83 |
default_interrupt(INT_IRQ31);
|
| 84 |
default_interrupt(INT_IRQ32);
|
84 |
default_interrupt(INT_IRQ32);
|
| 85 |
default_interrupt(INT_IRQ33);
|
85 |
default_interrupt(INT_IRQ33);
|
| 86 |
default_interrupt(INT_IRQ34);
|
86 |
default_interrupt(INT_IRQ34);
|
| Line 177... |
Line 177... |
| 177 |
static void (* irqvector[])(void) IDATA_ATTR =
|
177 |
static void (* irqvector[])(void) IDATA_ATTR =
|
| 178 |
{
|
178 |
{
|
| 179 |
INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
|
179 |
INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
|
| 180 |
INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
|
180 |
INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
|
| 181 |
INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_IRQ23,
|
181 |
INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_IRQ23,
|
| 182 |
INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_IRQ29,INT_IRQ30,INT_IRQ31,
|
182 |
INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
|
| 183 |
INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
|
183 |
INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
|
| 184 |
INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
|
184 |
INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
|
| 185 |
INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
|
185 |
INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
|
| 186 |
INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
|
186 |
INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
|
| 187 |
};
|
187 |
};
|
| Line 229... |
Line 229... |
| 229 |
void interrupt_init(void)
|
229 |
void interrupt_init(void)
|
| 230 |
{
|
230 |
{
|
| 231 |
VIC0INTENABLE = 1 << IRQ_TIMER;
|
231 |
VIC0INTENABLE = 1 << IRQ_TIMER;
|
| 232 |
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
232 |
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
| 233 |
VIC0INTENABLE = 1 << IRQ_DMAC1;
|
233 |
VIC0INTENABLE = 1 << IRQ_DMAC1;
|
| - |
|
234 |
#ifdef TARGET_ipodclassic
|
| - |
|
235 |
VIC0INTENABLE = 1 << IRQ_ATA;
|
| - |
|
236 |
#endif
|
| 234 |
}
|
237 |
}
|
| 235 |
|
238 |
|
| 236 |
void interrupt_shutdown(void)
|
239 |
void interrupt_shutdown(void)
|
| 237 |
{
|
240 |
{
|
| 238 |
VIC0INTENCLEAR = 0xffffffff;
|
241 |
VIC0INTENCLEAR = 0xffffffff;
|