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Line 130... |
| 130 |
#define DMACON7 (*((volatile uint32_t*)(0x384000E4)))
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130 |
#define DMACON7 (*((volatile uint32_t*)(0x384000E4)))
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| 131 |
#define DMATCNT7 (*((volatile uint32_t*)(0x384000E8)))
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131 |
#define DMATCNT7 (*((volatile uint32_t*)(0x384000E8)))
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| 132 |
#define DMACADDR7 (*((volatile uint32_t*)(0x384000EC)))
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132 |
#define DMACADDR7 (*((volatile uint32_t*)(0x384000EC)))
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| 133 |
#define DMACTCNT7 (*((volatile uint32_t*)(0x384000F0)))
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133 |
#define DMACTCNT7 (*((volatile uint32_t*)(0x384000F0)))
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| 134 |
#define DMACOM7 (*((volatile uint32_t*)(0x384000F4)))
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134 |
#define DMACOM7 (*((volatile uint32_t*)(0x384000F4)))
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#define DMABASE8 (*((volatile uint32_t*)(0x38400100)))
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136 |
#define DMACON8 (*((volatile uint32_t*)(0x38400104)))
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137 |
#define DMATCNT8 (*((volatile uint32_t*)(0x38400108)))
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#define DMACADDR8 (*((volatile uint32_t*)(0x3840010C)))
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#define DMACTCNT8 (*((volatile uint32_t*)(0x38400110)))
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#define DMACOM8 (*((volatile uint32_t*)(0x38400114)))
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| 135 |
#define DMAALLST (*((volatile uint32_t*)(0x38400180)))
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141 |
#define DMAALLST (*((volatile uint32_t*)(0x38400180)))
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#define DMAALLST2 (*((volatile uint32_t*)(0x38400184)))
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| 136 |
#define DMACON_DEVICE_SHIFT 30
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#define DMACON_DEVICE_SHIFT 30
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| 137 |
#define DMACON_DIRECTION_SHIFT 29
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144 |
#define DMACON_DIRECTION_SHIFT 29
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| 138 |
#define DMACON_DATA_SIZE_SHIFT 22
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145 |
#define DMACON_DATA_SIZE_SHIFT 22
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| 139 |
#define DMACON_BURST_LEN_SHIFT 19
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146 |
#define DMACON_BURST_LEN_SHIFT 19
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| 140 |
#define DMACOM_START 4
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147 |
#define DMACOM_START 4
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Line 198... |
| 191 |
#define ECC_SPARE_PTR (*((volatile uint32_t*)(0x39E00008)))
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198 |
#define ECC_SPARE_PTR (*((volatile uint32_t*)(0x39E00008)))
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| 192 |
#define ECC_CTRL (*((volatile uint32_t*)(0x39E0000C)))
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199 |
#define ECC_CTRL (*((volatile uint32_t*)(0x39E0000C)))
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| 193 |
#define ECC_RESULT (*((volatile uint32_t*)(0x39E00010)))
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#define ECC_RESULT (*((volatile uint32_t*)(0x39E00010)))
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| 194 |
#define ECC_UNK1 (*((volatile uint32_t*)(0x39E00014)))
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201 |
#define ECC_UNK1 (*((volatile uint32_t*)(0x39E00014)))
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| 195 |
#define ECC_INT_CLR (*((volatile uint32_t*)(0x39E00040)))
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202 |
#define ECC_INT_CLR (*((volatile uint32_t*)(0x39E00040)))
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| 196 |
#define INTMSK_ECC 0x80000
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| 197 |
#define ECCCTRL_STARTDECODING (1 << 0)
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203 |
#define ECCCTRL_STARTDECODING (1 << 0)
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| 198 |
#define ECCCTRL_STARTENCODING (1 << 1)
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204 |
#define ECCCTRL_STARTENCODING (1 << 1)
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| 199 |
#define ECCCTRL_STARTDECNOSYND (1 << 2)
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205 |
#define ECCCTRL_STARTDECNOSYND (1 << 2)
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| 200 |
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206 |
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| Line 259... |
Line 265... |
| 259 |
#define TDCMD (*((volatile uint32_t*)(0x3C700064)))
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265 |
#define TDCMD (*((volatile uint32_t*)(0x3C700064)))
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| 260 |
#define TDDATA0 (*((volatile uint32_t*)(0x3C700068)))
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266 |
#define TDDATA0 (*((volatile uint32_t*)(0x3C700068)))
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| 261 |
#define TDDATA1 (*((volatile uint32_t*)(0x3C70006C)))
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267 |
#define TDDATA1 (*((volatile uint32_t*)(0x3C70006C)))
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| 262 |
#define TDPRE (*((volatile uint32_t*)(0x3C700070)))
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268 |
#define TDPRE (*((volatile uint32_t*)(0x3C700070)))
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| 263 |
#define TDCNT (*((volatile uint32_t*)(0x3C700074)))
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269 |
#define TDCNT (*((volatile uint32_t*)(0x3C700074)))
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|
270 |
uint64_t read_5usec_timer();
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|
271 |
uint32_t read_usec_timer();
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|
272 |
#define FIVE_USEC_TIMER (read_5usec_timer()) /* 64bit 5usec timer */
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|
273 |
#define USEC_TIMER (read_usec_timer()) /* usecs */
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276 |
/////USB/////
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277 |
#define OTGBASE 0x38800000
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|
278 |
#define PHYBASE 0x3C400000
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279 |
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|
280 |
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|
281 |
/////I2C/////
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|
282 |
#define IICCON (*((volatile uint32_t*)(0x3C900000)))
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| 264 |
#define FIVE_USEC_TIMER (((uint64_t)(*((volatile uint32_t*)(0x3C700080))) << 32) \
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283 |
#define IICSTAT (*((volatile uint32_t*)(0x3C900004)))
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| 265 |
| (*((volatile uint32_t*)(0x3C700084)))) /* 64bit 5usec timer */
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284 |
#define IICADD (*((volatile uint32_t*)(0x3C900008)))
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| 266 |
#define USEC_TIMER ((long)(FIVE_USEC_TIMER * 5)) /* usecs */
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285 |
#define IICDS (*((volatile uint32_t*)(0x3C90000C)))
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|
286 |
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|
287 |
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|
288 |
/////INTERRUPTS/////
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| 267 |
#define INTMSK_TIMER (1<<5)
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289 |
#define INTMSK_TIMER (1<<5)
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|
290 |
#define INTMSK_DMA (1<<10)
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|
291 |
#define INTMSK_USB_OTG (1<<16)
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|
292 |
#define INTMSK_ECC (1<<19)
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|
293 |
#define INTMSK_IIC (1<<27)
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| 268 |
|
294 |
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| 269 |
|
295 |
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| 270 |
#endif
|
296 |
#endif
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