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Rev 2 Rev 35
Line 60... Line 60...
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        "BNE invalidate_dcache_loop\n\t"
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        "BNE invalidate_dcache_loop\n\t"
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        "MCR p15, 0, R0,c7,c10,4   \n\t"
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        "MCR p15, 0, R0,c7,c10,4   \n\t"
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        "MOV PC, LR                \n\t"
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        "MOV PC, LR                \n\t"
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    );
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    );
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}
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}
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void invalidate_icache()
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{
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    asm volatile(
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        "MOV R0, #0                \n\t"
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        "MCR p15, 0, R0,c7,c5,0    \n\t"
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        "MOV PC, LR                \n\t"
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    );
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}