WebSVN – freemyipod – Diff – /embios/trunk/target/ipodclassic/storage_ata.c



static bool ata_powered;
 
 
static uint16_t ata_read_cbr(uint32_t volatile* reg)
{
    while (!(ATA_PIO_READY & 2)) yield();
    volatile uint32_t dummy = *reg;
    while (!(ATA_PIO_READY & 1)) yield();
    return ATA_PIO_RDATA;
}
 
static void ata_write_cbr(uint32_t volatile* reg, uint16_t data)
{
    while (!(ATA_PIO_READY & 2)) yield();
    *reg = data;
}
 
static int ata_wait_for_not_bsy(long timeout)
{

    while (true)
    {
        uint8_t csd = ata_read_cbr(&ATA_PIO_CSD);
        if (!(csd & BIT(7))) return 0;
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(0);
 
    }
}
 
static int ata_wait_for_rdy(long timeout)
{

    while (true)
    {
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
        if (dad & BIT(6)) return 0;
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(1);
 
    }
}
 
static int ata_wait_for_start_of_transfer(long timeout)
{

    {
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
        if (dad & BIT(0)) RET_ERR(1);
        if ((dad & (BIT(7) | BIT(3))) == BIT(3)) return 0;
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(2);
 
    }
}
 
static int ata_wait_for_end_of_transfer(long timeout)
{

void ata_set_active(void)
{
    ata_last_activity_value = USEC_TIMER;
}
 
int ata_set_feature(uint32_t feature, uint32_t param)
{
    PASS_RC(ata_wait_for_rdy(500000), 1, 0);
    ata_write_cbr(&ATA_PIO_DVR, 0);
    ata_write_cbr(&ATA_PIO_FED, 3);
    ata_write_cbr(&ATA_PIO_SCR, param);
    ata_write_cbr(&ATA_PIO_CSD, feature);
    PASS_RC(ata_wait_for_rdy(500000), 1, 1);
    return 0;
}
 
int ata_power_up()
{
    ata_set_active();
    i2c_sendbyte(0, 0xe6, 0x1b, 1);
    clockgate_enable(5, true);

            ata_dma_flags = BIT(2) | BIT(3) | BIT(9) | BIT(10);
            param |= 0x40;
        }
    }
    ata_dma = param ? true : false;
    PASS_RC(ata_set_feature(0xef, param), 2, 1);
 
 
 
    if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(2, 0), 2, 2);
    if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0x55, 0), 2, 3);
    ATA_PIO_TIME = piotime;
    ATA_MDMA_TIME = mdmatime;
    ATA_UDMA_TIME = udmatime;
    ata_powered = true;
    ata_set_active();

    ata_write_cbr(&ATA_PIO_DVR, 0);
    ata_write_cbr(&ATA_PIO_CSD, 0xe0);
    ata_wait_for_rdy(1000000);
    sleep(30000);
    ATA_CONTROL = 0;
    while (!(ATA_CONTROL & BIT(1))) yield();
    clockgate_enable(5, false);
    i2c_sendbyte(0, 0xe6, 0x1b, 0);
}
 
int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool write)

    if (ata_dma && write) clean_dcache();
    else if (ata_dma) invalidate_dcache();
    ATA_COMMAND = BIT(1);
    while (count)
    {
        uint32_t cnt = MIN(ata_lba48 ? 8192 : 32, count);
        PASS_RC(ata_wait_for_rdy(100000), 2, 0);
        ata_write_cbr(&ATA_PIO_DVR, 0);
        if (ata_lba48)
        {
            ata_write_cbr(&ATA_PIO_SCR, cnt >> 5);

Rev 316	Rev 317
Line 39...	Line 39...
39	`static bool ata_powered;`	39	`static bool ata_powered;`
40		40
41		41
42	`static uint16_t ata_read_cbr(uint32_t volatile* reg)`	42	`static uint16_t ata_read_cbr(uint32_t volatile* reg)`
43	`{`	43	`{`
44	`while (!(ATA_PIO_READY & 2)) sleep(0);`	44	`while (!(ATA_PIO_READY & 2)) yield();`
45	`volatile uint32_t dummy = *reg;`	45	`volatile uint32_t dummy = *reg;`
46	`while (!(ATA_PIO_READY & 1)) sleep(0);`	46	`while (!(ATA_PIO_READY & 1)) yield();`
47	`return ATA_PIO_RDATA;`	47	`return ATA_PIO_RDATA;`
48	`}`	48	`}`
49		49
50	`static void ata_write_cbr(uint32_t volatile* reg, uint16_t data)`	50	`static void ata_write_cbr(uint32_t volatile* reg, uint16_t data)`
51	`{`	51	`{`
52	`while (!(ATA_PIO_READY & 2)) sleep(0);`	52	`while (!(ATA_PIO_READY & 2)) yield();`
53	`*reg = data;`	53	`*reg = data;`
54	`}`	54	`}`
55		55
56	`static int ata_wait_for_not_bsy(long timeout)`	56	`static int ata_wait_for_not_bsy(long timeout)`
57	`{`	57	`{`
Line 59...	Line 59...
59	`while (true)`	59	`while (true)`
60	`{`	60	`{`
61	`uint8_t csd = ata_read_cbr(&ATA_PIO_CSD);`	61	`uint8_t csd = ata_read_cbr(&ATA_PIO_CSD);`
62	`if (!(csd & BIT(7))) return 0;`	62	`if (!(csd & BIT(7))) return 0;`
63	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(0);`	63	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(0);`
64	`sleep(100);`	-
65	`}`	64	`}`
66	`}`	65	`}`
67		66
68	`static int ata_wait_for_rdy(long timeout)`	67	`static int ata_wait_for_rdy(long timeout)`
69	`{`	68	`{`
Line 72...	Line 71...
72	`while (true)`	71	`while (true)`
73	`{`	72	`{`
74	`uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);`	73	`uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);`
75	`if (dad & BIT(6)) return 0;`	74	`if (dad & BIT(6)) return 0;`
76	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(1);`	75	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(1);`
77	`sleep(100);`	-
78	`}`	76	`}`
79	`}`	77	`}`
80		78
81	`static int ata_wait_for_start_of_transfer(long timeout)`	79	`static int ata_wait_for_start_of_transfer(long timeout)`
82	`{`	80	`{`
Line 86...	Line 84...
86	`{`	84	`{`
87	`uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);`	85	`uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);`
88	`if (dad & BIT(0)) RET_ERR(1);`	86	`if (dad & BIT(0)) RET_ERR(1);`
89	`if ((dad & (BIT(7) \| BIT(3))) == BIT(3)) return 0;`	87	`if ((dad & (BIT(7) \| BIT(3))) == BIT(3)) return 0;`
90	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(2);`	88	`if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(2);`
91	`sleep(100);`	-
92	`}`	89	`}`
93	`}`	90	`}`
94		91
95	`static int ata_wait_for_end_of_transfer(long timeout)`	92	`static int ata_wait_for_end_of_transfer(long timeout)`
96	`{`	93	`{`
Line 118...	Line 115...
118	`void ata_set_active(void)`	115	`void ata_set_active(void)`
119	`{`	116	`{`
120	`ata_last_activity_value = USEC_TIMER;`	117	`ata_last_activity_value = USEC_TIMER;`
121	`}`	118	`}`
122		119
-		120	`int ata_set_feature(uint32_t feature, uint32_t param)`
-		121	`{`
-		122	`PASS_RC(ata_wait_for_rdy(500000), 1, 0);`
-		123	`ata_write_cbr(&ATA_PIO_DVR, 0);`
-		124	`ata_write_cbr(&ATA_PIO_FED, 3);`
-		125	`ata_write_cbr(&ATA_PIO_SCR, param);`
-		126	`ata_write_cbr(&ATA_PIO_CSD, feature);`
-		127	`PASS_RC(ata_wait_for_rdy(500000), 1, 1);`
-		128	`return 0;`
-		129	`}`
-		130
123	`int ata_power_up()`	131	`int ata_power_up()`
124	`{`	132	`{`
125	`ata_set_active();`	133	`ata_set_active();`
126	`i2c_sendbyte(0, 0xe6, 0x1b, 1);`	134	`i2c_sendbyte(0, 0xe6, 0x1b, 1);`
127	`clockgate_enable(5, true);`	135	`clockgate_enable(5, true);`
Line 198...	Line 206...
198	`ata_dma_flags = BIT(2) \| BIT(3) \| BIT(9) \| BIT(10);`	206	`ata_dma_flags = BIT(2) \| BIT(3) \| BIT(9) \| BIT(10);`
199	`param \|= 0x40;`	207	`param \|= 0x40;`
200	`}`	208	`}`
201	`}`	209	`}`
202	`ata_dma = param ? true : false;`	210	`ata_dma = param ? true : false;`
203	`PASS_RC(ata_wait_for_rdy(500000), 2, 1);`	211	`PASS_RC(ata_set_feature(0xef, param), 2, 1);`
204	`ata_write_cbr(&ATA_PIO_DVR, 0);`	-
205	`ata_write_cbr(&ATA_PIO_FED, 3);`	-
206	`ata_write_cbr(&ATA_PIO_SCR, param);`	-
207	`ata_write_cbr(&ATA_PIO_CSD, 0xef);`	212	`if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(2, 0), 2, 2);`
208	`PASS_RC(ata_wait_for_rdy(500000), 2, 2);`	213	`if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0x55, 0), 2, 3);`
209	`ATA_PIO_TIME = piotime;`	214	`ATA_PIO_TIME = piotime;`
210	`ATA_MDMA_TIME = mdmatime;`	215	`ATA_MDMA_TIME = mdmatime;`
211	`ATA_UDMA_TIME = udmatime;`	216	`ATA_UDMA_TIME = udmatime;`
212	`ata_powered = true;`	217	`ata_powered = true;`
213	`ata_set_active();`	218	`ata_set_active();`
Line 221...	Line 226...
221	`ata_write_cbr(&ATA_PIO_DVR, 0);`	226	`ata_write_cbr(&ATA_PIO_DVR, 0);`
222	`ata_write_cbr(&ATA_PIO_CSD, 0xe0);`	227	`ata_write_cbr(&ATA_PIO_CSD, 0xe0);`
223	`ata_wait_for_rdy(1000000);`	228	`ata_wait_for_rdy(1000000);`
224	`sleep(30000);`	229	`sleep(30000);`
225	`ATA_CONTROL = 0;`	230	`ATA_CONTROL = 0;`
226	`while (!(ATA_CONTROL & BIT(1))) sleep(0);`	231	`while (!(ATA_CONTROL & BIT(1))) yield();`
227	`clockgate_enable(5, false);`	232	`clockgate_enable(5, false);`
228	`i2c_sendbyte(0, 0xe6, 0x1b, 0);`	233	`i2c_sendbyte(0, 0xe6, 0x1b, 0);`
229	`}`	234	`}`
230		235
231	`int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool write)`	236	`int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool write)`
Line 236...	Line 241...
236	`if (ata_dma && write) clean_dcache();`	241	`if (ata_dma && write) clean_dcache();`
237	`else if (ata_dma) invalidate_dcache();`	242	`else if (ata_dma) invalidate_dcache();`
238	`ATA_COMMAND = BIT(1);`	243	`ATA_COMMAND = BIT(1);`
239	`while (count)`	244	`while (count)`
240	`{`	245	`{`
241	`uint32_t cnt = MIN(32, count);`	246	`uint32_t cnt = MIN(ata_lba48 ? 8192 : 32, count);`
242	`PASS_RC(ata_wait_for_rdy(100000), 2, 0);`	247	`PASS_RC(ata_wait_for_rdy(100000), 2, 0);`
243	`ata_write_cbr(&ATA_PIO_DVR, 0);`	248	`ata_write_cbr(&ATA_PIO_DVR, 0);`
244	`if (ata_lba48)`	249	`if (ata_lba48)`
245	`{`	250	`{`
246	`ata_write_cbr(&ATA_PIO_SCR, cnt >> 5);`	251	`ata_write_cbr(&ATA_PIO_SCR, cnt >> 5);`

Subversion Repositories freemyipod

(root)/embios/trunk/target/ipodclassic/storage_ata.c @ 317 – Rev 316 → 317