WebSVN – freemyipod – Diff – /embios/trunk/arm-support.S



    .byte  0,  9,  0, 16,  0,  0,  1, 26,  0, 13,  0,  0, 24,  5,  0,  0
    .byte  0, 21,  0,  8, 11,  0, 15,  0,  0,  0,  0,  2, 27,  0, 25,  0
    .byte 22,  0, 12,  0,  0,  3, 28,  0, 23,  0,  4, 29,  0,  0, 30, 31
    .size __clzsi2, .-__clzsi2
 
    .section .text.__divisionhelpers
#ifndef __ARM_EABI__
 
__udivsi3:
    ARMV4_UDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1
    .size __udivsi3, . - __udivsi3
 
 
__divsi3:
    ARMV4_SDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1
    .size __divsi3, . - __divsi3
 
#else
 
__aeabi_uidivmod:
    ARMV4_UDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1
    .size __aeabi_uidivmod, . - __aeabi_uidivmo
 
 
__aeabi_idivmod:
    ARMV4_SDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1
    .size __aeabi_idivmod, . - __aeabi_idivmod
#endif
 
#else
#ifndef __ARM_EABI__
 
__udivsi3:
    ARMV5_UDIV32_BODY r0, r1, r0, "", r2, r3, ip, __div0_wrap, 1
    .size __udivsi3, . - __udivsi3
 
 
__divsi3:
    str lr, [sp, #-4]
    ARMV5_SDIV32_BODY r0, r1, r0, "", r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"
    .size __divsi3, . - __divsi3
 
#else
 
__aeabi_uidivmod:
    ARMV5_UDIV32_BODY r0, r1, r0, r1, r2, r3, ip, __div0_wrap, 1
    .size __aeabi_uidivmod, . - __aeabi_uidivmo
 
 
__aeabi_idivmod:
    str lr, [sp, #-4]
    ARMV5_SDIV32_BODY r0, r1, r0, r1, r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"
    .size __aeabi_idivmod, . - __aeabi_idivmod
#endif
 
 
.L_udiv_est_table:
    .byte 0xff, 0xfc, 0xf8, 0xf4, 0xf0, 0xed, 0xea, 0xe6
    .byte 0xe3, 0xe0, 0xdd, 0xda, 0xd7, 0xd4, 0xd2, 0xcf
    .byte 0xcc, 0xca, 0xc7, 0xc5, 0xc3, 0xc0, 0xbe, 0xbc
    .byte 0xba, 0xb8, 0xb6, 0xb4, 0xb2, 0xb0, 0xae, 0xac

Rev 2	Rev 6
Line 650...	Line 650...
650	`.byte 0, 9, 0, 16, 0, 0, 1, 26, 0, 13, 0, 0, 24, 5, 0, 0`	650	`.byte 0, 9, 0, 16, 0, 0, 1, 26, 0, 13, 0, 0, 24, 5, 0, 0`
651	`.byte 0, 21, 0, 8, 11, 0, 15, 0, 0, 0, 0, 2, 27, 0, 25, 0`	651	`.byte 0, 21, 0, 8, 11, 0, 15, 0, 0, 0, 0, 2, 27, 0, 25, 0`
652	`.byte 22, 0, 12, 0, 0, 3, 28, 0, 23, 0, 4, 29, 0, 0, 30, 31`	652	`.byte 22, 0, 12, 0, 0, 3, 28, 0, 23, 0, 4, 29, 0, 0, 30, 31`
653	`.size __clzsi2, .-__clzsi2`	653	`.size __clzsi2, .-__clzsi2`
654		654
-		655	`.section .text.__divisionhelpers`
655	`#ifndef __ARM_EABI__`	656	`#ifndef __ARM_EABI__`
656	`.section .text.__udivsi3`	-
657	`__udivsi3:`	657	`__udivsi3:`
658	`ARMV4_UDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1`	658	`ARMV4_UDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1`
659	`.size __udivsi3, . - __udivsi3`	659	`.size __udivsi3, . - __udivsi3`
660		660
661	`.section .text._divsi3`	-
662	`__divsi3:`	661	`__divsi3:`
663	`ARMV4_SDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1`	662	`ARMV4_SDIV32_BODY r0, r1, r0, "", r2, r3, __div0_wrap, 1`
664	`.size __divsi3, . - __divsi3`	663	`.size __divsi3, . - __divsi3`
665		664
666	`#else`	665	`#else`
667	`.section .text.__aeabi_uidivmod`	-
668	`__aeabi_uidivmod:`	666	`__aeabi_uidivmod:`
669	`ARMV4_UDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1`	667	`ARMV4_UDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1`
670	`.size __aeabi_uidivmod, . - __aeabi_uidivmo`	668	`.size __aeabi_uidivmod, . - __aeabi_uidivmo`
671		669
672	`.section .text.__aeabi_idivmod`	-
673	`__aeabi_idivmod:`	670	`__aeabi_idivmod:`
674	`ARMV4_SDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1`	671	`ARMV4_SDIV32_BODY r0, r1, r0, r1, r2, r3, __div0_wrap, 1`
675	`.size __aeabi_idivmod, . - __aeabi_idivmod`	672	`.size __aeabi_idivmod, . - __aeabi_idivmod`
676	`#endif`	673	`#endif`
677		674
678	`#else`	675	`#else`
679	`#ifndef __ARM_EABI__`	676	`#ifndef __ARM_EABI__`
680	`.section .text.__udivsi3`	-
681	`__udivsi3:`	677	`__udivsi3:`
682	`ARMV5_UDIV32_BODY r0, r1, r0, "", r2, r3, ip, __div0_wrap, 1`	678	`ARMV5_UDIV32_BODY r0, r1, r0, "", r2, r3, ip, __div0_wrap, 1`
683	`.size __udivsi3, . - __udivsi3`	679	`.size __udivsi3, . - __udivsi3`
684		680
685	`.section .text.__divsi3`	-
686	`__divsi3:`	681	`__divsi3:`
687	`str lr, [sp, #-4]`	682	`str lr, [sp, #-4]`
688	`ARMV5_SDIV32_BODY r0, r1, r0, "", r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"`	683	`ARMV5_SDIV32_BODY r0, r1, r0, "", r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"`
689	`.size __divsi3, . - __divsi3`	684	`.size __divsi3, . - __divsi3`
690		685
691	`#else`	686	`#else`
692	`.section .text.__aeabi_uidivmod`	-
693	`__aeabi_uidivmod:`	687	`__aeabi_uidivmod:`
694	`ARMV5_UDIV32_BODY r0, r1, r0, r1, r2, r3, ip, __div0_wrap, 1`	688	`ARMV5_UDIV32_BODY r0, r1, r0, r1, r2, r3, ip, __div0_wrap, 1`
695	`.size __aeabi_uidivmod, . - __aeabi_uidivmo`	689	`.size __aeabi_uidivmod, . - __aeabi_uidivmo`
696		690
697	`.section .text.__aeabi_idivmod`	-
698	`__aeabi_idivmod:`	691	`__aeabi_idivmod:`
699	`str lr, [sp, #-4]`	692	`str lr, [sp, #-4]`
700	`ARMV5_SDIV32_BODY r0, r1, r0, r1, r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"`	693	`ARMV5_SDIV32_BODY r0, r1, r0, r1, r2, lr, ip, r3, __div0_wrap_s, "ldr pc, [sp, #-4]"`
701	`.size __aeabi_idivmod, . - __aeabi_idivmod`	694	`.size __aeabi_idivmod, . - __aeabi_idivmod`
702	`#endif`	695	`#endif`
703		696
704	`.section .text._L_udiv_est_table`	-
705	`.L_udiv_est_table:`	697	`.L_udiv_est_table:`
706	`.byte 0xff, 0xfc, 0xf8, 0xf4, 0xf0, 0xed, 0xea, 0xe6`	698	`.byte 0xff, 0xfc, 0xf8, 0xf4, 0xf0, 0xed, 0xea, 0xe6`
707	`.byte 0xe3, 0xe0, 0xdd, 0xda, 0xd7, 0xd4, 0xd2, 0xcf`	699	`.byte 0xe3, 0xe0, 0xdd, 0xda, 0xd7, 0xd4, 0xd2, 0xcf`
708	`.byte 0xcc, 0xca, 0xc7, 0xc5, 0xc3, 0xc0, 0xbe, 0xbc`	700	`.byte 0xcc, 0xca, 0xc7, 0xc5, 0xc3, 0xc0, 0xbe, 0xbc`
709	`.byte 0xba, 0xb8, 0xb6, 0xb4, 0xb2, 0xb0, 0xae, 0xac`	701	`.byte 0xba, 0xb8, 0xb6, 0xb4, 0xb2, 0xb0, 0xae, 0xac`

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(root)/embios/trunk/arm-support.S @ 12 – Rev 2 → 6