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Rev 194 Rev 195
Line 48... Line 48...
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	mcr	p15, 0, r0,c7,c10,4
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	mcr	p15, 0, r0,c7,c10,4
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	mov	pc, lr
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	mov	pc, lr
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cacheflush_done:
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cacheflush_done:
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	adr	r0, _start
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	adr	r0, _start
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	adr	r1, _stubend + 4
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	adr	r1, _stubend + 16  @ should be +4, increased to make it fit into a shifter arg
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	mov	r2, #0x22000000
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	mov	r2, #0x22000000
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copyloop:
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copyloop:
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	cmp	r1, r0
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	cmp	r1, r0
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	ldrhi	r3, [r0], #4
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	ldrhi	r3, [r0], #4
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	strhi	r3, [r2], #4
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	strhi	r3, [r2], #4