Subversion Repositories freemyipod

Rev

Rev 725 | Rev 749 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 725 Rev 726
Line 22... Line 22...
22 
@
 22 
@
23 
@
 23 
@
24 
 
 24 
 
25 
.global _start
 25 
.global _start
26 
_start:
 26 
_start:
27 
 
 - 
 
28 
	msr	cpsr_c, #0xd3
 27 
	msr	cpsr_c, #0xd3
29 
	mrc	p15, 0, r0,c1,c0
 28 
	mrc	p15, 0, r0,c1,c0
30 
	bic	r0, r0, #1
 29 
	bic	r0, r0, #1
31 
	mcr	p15, 0, r0,c1,c0 @ disable mmu
 30 
	mcr	p15, 0, r0,c1,c0 @ disable mmu
32 
 
 31 
 
33 
	mov	lr, #0
 32 
	mov	lr, #0
34 
	adr	sp, values1
 - 
 
35 
	mcr	p15, 0, lr,c7,c14,0 @ clean & invalidate data cache
 33 
	mcr	p15, 0, lr,c7,c14,0 @ clean & invalidate data cache
36 
	mcr	p15, 0, lr,c7,c10,4 @ drain write buffer
 34 
	mcr	p15, 0, lr,c7,c10,4 @ drain write buffer
37 
	mcr	p15, 0, lr,c7,c5    @ invalidate instruction cache
 35 
	mcr	p15, 0, lr,c7,c5    @ invalidate instruction cache
- 
 
 36 
	mcr	p15, 0, lr,c7,c5,4  @ flush prefetch buffer
38 
	mcr	p15, 0, lr,c8,c7    @ invalidate all unlocked entries in the TLB
 37 
	mcr	p15, 0, lr,c8,c7    @ invalidate all unlocked entries in the TLB
39 
	mcr	p15, 0, lr,c13,c0,0 @ disable context id register
 38 
	mcr	p15, 0, lr,c13,c0,0 @ disable context id register
40
39
- 
 
 40 
	adr	sp, values1
- 
 
 41 
 
41 
.macro block0_constpool	   @ Block 0 (MMU, DMA) register map:
 42 
.macro block0_constpool    @ Block 0 (MMU) register map:
42 
                           @ R0: Unused
 43 
                           @ R0: Unused
43 
                           @ R1: Unused
 44 
                           @ R1: Unused
44 
                           @ R2: Unused
 45 
                           @ R2: Unused
45 
                           @ R3: Scratchpad
 46 
                           @ R3: Scratchpad
46 
	                   @ R4: Unused
 47 
                           @ R4: Unused
47 
	                   @ R5: Unused
 48 
                           @ R5: Unused
48 
	                   @ R6: Unused
 49 
                           @ R6: Unused
49 
	                   @ R7: Unused
 50 
                           @ R7: Unused
50 
	                   @ R8: Unused
 51 
                           @ R8: Unused
51 
	                   @ R9: Unused
 52 
                           @ R9: Unused
52 
	.word	0x0005107D @ R10: CP15r1
 53 
	.word	0x0005187D @ R10: CP15r1
53 
	.word	0x2202C000 @ R11: First level page table
 54 
	.word	0x2202C000 @ R11: First level page table
54 
	.word	0x00000C1E @ R12: Default segment flags
 55 
	.word	0x00000C1E @ R12: Default segment flags
55 
                           @ R13: Constant pool pointer
 56 
                           @ R13: Constant pool pointer
56 
.endm                      @ R14: 0
 57 
.endm                      @ R14: 0
57 
 
 58 
 
58 
	ldmia	sp!, {r10-r12}
 59 
	ldmia	sp!, {r10-r12}
59 
	mcr	p15, 0, r11,c2,c0 @ set first level translation table
 60 
	mcr	p15, 0, r11,c2,c0 @ set first level translation table
60 
	mov	r3, #-1
 61 
	mov	r3, #-1
61 
	mcr	p15, 0, r3,c3,c0 @ disable domain access control                  @ R3: Unused
 62 
	mcr	p15, 0, r3,c3,c0 @ disable domain access control                  @ R3: Unused
- 
 
 63 
	orr	r0, r12, #0x22000000
- 
 
 64 
	str	r0, [r11], #4
- 
 
 65 
	add	r12, r12, #0x00100000
62 
mmuloop:
 66 
mmuloop:
63 
	str	r12, [r11], #4
 67 
	str	r12, [r11], #4
64 
	add	r12, r12, #0x00100000
 68 
	add	r12, r12, #0x00100000
65 
	cmp	r12, #0x38000000
 69 
	cmp	r12, #0x38000000
66 
	biccs	r12, r12, #0xc
 70 
	biccs	r12, r12, #0xc
67 
	tst	r12, #0x40000000
 71 
	tst	r12, #0x40000000
68 
	beq	mmuloop
 72 
	beq	mmuloop
69 
                       								  @ R11: Unused
 73 
                                                                                  @ R11: Unused
70 
    										  @ R12: Unused
 74 
                                                                                  @ R12: Unused
71 
	mcr	p15, 0, r10,c1,c0                                                 @ R10: Unused
 75 
	mcr	p15, 0, r10,c1,c0                                                 @ R10: Unused
72 
 
 76 
 
- 
 
 77 
 
73 
.macro block1_constpool	   @ Block 1 (SYSCON) register map:
 78 
.macro block1_constpool    @ Block 1 (SYSCON) register map:
74 
	.word	0x000327E5 @ R0: PWRCON(0)
 79 
	.word	0x000327E5 @ R0: PWRCON(0)
75 
	.word	0xFE2BED6D @ R1: PWRCON(1)
 80 
	.word	0xFE2BED6D @ R1: PWRCON(1)
76 
	.word	0x00DCF779 @ R2: PWRCON(4)
 81 
	.word	0x00DCF779 @ R2: PWRCON(4)
77 
	.word	0x003E3E00 @ R3
 82 
	.word	0x003E3E00 @ R3
78 
	.word	0x06008501 @ R4
 83 
	.word	0x06008501 @ R4
Line 86... Line 91...
86 
	.word	0x3C500000 @ R12: SYSCON base address
 91 
	.word	0x3C500000 @ R12: SYSCON base address
87 
                           @ R13: Constant pool pointer
 92 
                           @ R13: Constant pool pointer
88 
.endm                      @ R14: 0
 93 
.endm                      @ R14: 0
89 
 
 94 
 
90 
	ldmia	sp!, {r0-r12}
 95 
	ldmia	sp!, {r0-r12}
91 
	str	r0, [r12,#0x48]  @ PWRCON0 ...					  @ R0: Scratchpad
 96 
	str	r0, [r12,#0x48]  @ PWRCON0 ...                                    @ R0: Scratchpad
92 
	str	r1, [r12,#0x4c]
 97 
	str	r1, [r12,#0x4c]
93 
	mov	r0, #0x73
 98 
	mov	r0, #0x73
94 
	str	r0, [r12,#0x58]
 99 
	str	r0, [r12,#0x58]
95 
	mov	r0, #0xff
 100 
	mov	r0, #0xff
96 
	str	r0, [r12,#0x68]
 101 
	str	r0, [r12,#0x68]
Line 109... Line 114...
109
114
110 
	mov	r0, #0x7
 115 
	mov	r0, #0x7
111 
	str	r0, [r12,#0x44]
 116 
	str	r0, [r12,#0x44]
112 
	str	lr, [r12,#0x44]
 117 
	str	lr, [r12,#0x44]
113 
	str	lr, [r12,#0x3c]
 118 
	str	lr, [r12,#0x3c]
114 
	str	r4, [r12,#0x20]							  @ R4: Scratchpad
 119 
	str	r4, [r12,#0x20]                                                   @ R4: Scratchpad
115 
	str	r5, [r12,#0x30]
 120 
	str	r5, [r12,#0x30]
116 
	mov	r5, #1                                                            @ R5: 1
 121 
	mov	r5, #1                                                            @ R5: 1
117 
	str	r5, [r12,#0x44]
 122 
	str	r5, [r12,#0x44]
118 
	orr	r4, r0, #0x10000
 123 
	orr	r4, r0, #0x10000
119 
	str	r4, [r12,#0x44]
 124 
	str	r4, [r12,#0x44]
120 
sysconwait3:
 125 
sysconwait3:
121 
	ldr	r4, [r12,#0x40]
 126 
	ldr	r4, [r12,#0x40]
122 
	tst	r4, #0x1
 127 
	tst	r4, #0x1
123 
	beq	sysconwait3      @ while (!([SYSCON+0x40] & 1))
 128 
	beq	sysconwait3      @ while (!([SYSCON+0x40] & 1))
124
129
125 
	str	r6, [r12,#0x04]							  @ R6: Unused
 130 
	str	r6, [r12,#0x04]                                                   @ R6: Unused
126 
	add	r3, r3, #0x3e                                                     @ R3: 0x003E3E3E
 131 
	add	r3, r3, #0x3e                                                     @ R3: 0x003E3E3E
127 
sysconwait4:
 132 
sysconwait4:
128 
	ldr	r4, [r12,#0x04]
 133 
	ldr	r4, [r12,#0x04]
129 
	tst	r4, r3								  @ R3: Unused
 134 
	tst	r4, r3                                                            @ R3: Unused
130 
	bne	sysconwait4
 135 
	bne	sysconwait4
131
136
132 
	str	r7, [r12]							  @ R7: Unused
 137 
	str	r7, [r12]                                                         @ R7: Unused
133 
sysconwait5:
 138 
sysconwait5:
134 
	ldr	r2, [r12]
 139 
	ldr	r2, [r12]
135 
	tst	r4, #0xf
 140 
	tst	r4, #0xf
136 
	bne	sysconwait5
 141 
	bne	sysconwait5
137
142
138 
	str	r8, [r12,#0x08]
 143 
	str	r8, [r12,#0x08]
139 
	orr	r4, r8, r8,lsr#1						  @ R8: Unused
 144 
	orr	r4, r8, r8,lsr#1                                                  @ R8: Unused
140 
	str	r4, [r12,#0x0c]
 145 
	str	r4, [r12,#0x0c]
141 
	mov	r4, #0xc000
 146 
	mov	r4, #0xc000
142 
	str	r4, [r12,#0x10]
 147 
	str	r4, [r12,#0x10]
143 
	mov	r4, #0x8000
 148 
	mov	r4, #0x8000
144 
	str	r4, [r12,#0x14]
 149 
	str	r4, [r12,#0x14]
145 
	str	r4, [r12,#0x70]
 150 
	str	r4, [r12,#0x70]
146 
	mov	r4, #2
 151 
	mov	r4, #2
147 
	str	r4, [r9]                                                          @ R9: Unused
 152 
	str	r4, [r9]                                                          @ R9: Unused
148 
	mov	r0, #0x10                                                         @ R5: 0x10
 153 
	mov	r0, #0x10                                                         @ R5: 0x10
149 
 
 154 
 
150 
	                   @ Block 2 (TIMER) register map:
 155 
                           @ Block 2 (TIMER) register map:
151 
	                   @ R0: 1
 156 
                           @ R0: 1
152 
	                   @ R1: PWRCON(1)
 157 
                           @ R1: PWRCON(1)
153 
	                   @ R2: PWRCON(4)
 158 
                           @ R2: PWRCON(4)
154 
	                   @ R3: Scratchpad
 159 
                           @ R3: Scratchpad
155 
	                   @ R4: Scratchpad
 160 
                           @ R4: Scratchpad
156 
	                   @ R5: 0x10
 161 
                           @ R5: 0x10
157 
	                   @ R6: Unused
 162 
                           @ R6: Unused
158 
	                   @ R7: Unused
 163 
                           @ R7: Unused
159 
	                   @ R8: Unused
 164 
                           @ R8: Unused
160 
	                   @ R9: Unused
 165 
                           @ R9: Unused
161 
	                   @ R10: PWRCON(1) during timer setup
 166 
                           @ R10: PWRCON(1) during timer setup
162 
	                   @ R11: PWRCON(4) during timer setup
 167 
                           @ R11: PWRCON(4) during timer setup
163 
	                   @ R12: SYSCON base address
 168 
                           @ R12: SYSCON base address
164 
                           @ R13: Constant pool pointer
 169 
                           @ R13: Constant pool pointer
165 
                           @ R14: 0
 170 
                           @ R14: 0
166 
 
 171 
 
167 
	str	r10, [r12,#0x4c]     @ PWRCON(1) for timer setup                  @ R10: Unused
 172 
	str	r10, [r12,#0x4c]     @ PWRCON(1) for timer setup                  @ R10: Unused
168 
	mov	r4, #0x13
 173 
	mov	r4, #0x13
169 
	str	r4, [r12,#0x58]	     @ PWRCON(2) for timer setup
 174 
	str	r4, [r12,#0x58]             @ PWRCON(2) for timer setup
170 
	str	r11, [r12,#0x6c]     @ PWRCON(4) for timer setup                  @ R11: Unused
 175 
	str	r11, [r12,#0x6c]     @ PWRCON(4) for timer setup                  @ R11: Unused
171 
	orr     r11, r12, #0x00200000                                             @ R11: TIMER base address
 176 
	orr     r11, r12, #0x00200000                                             @ R11: TIMER base address
172 
	str	r0, [r11,#0x4]       @ TACMD = 0x10
 177 
	str	r0, [r11,#0x4]       @ TACMD = 0x10
173 
	str	r0, [r11,#0x24]      @ TBCMD = 0x10
 178 
	str	r0, [r11,#0x24]      @ TBCMD = 0x10
174 
	str	r0, [r11,#0x44]      @ TCCMD = 0x10
 179 
	str	r0, [r11,#0x44]      @ TCCMD = 0x10
Line 186... Line 191...
186 
	str	r0, [r11,#0x104]     @ THCMD = 0x10
 191 
	str	r0, [r11,#0x104]     @ THCMD = 0x10
187 
	str	r4, [r11,#0x118]     @ THCMD = 0xFFFFFFFF
 192 
	str	r4, [r11,#0x118]     @ THCMD = 0xFFFFFFFF
188 
	str	r1, [r12,#0x4c]      @ PWRCON(1)                                  @ R1: Unused
 193 
	str	r1, [r12,#0x4c]      @ PWRCON(1)                                  @ R1: Unused
189 
	mov	r3, #0x73
 194 
	mov	r3, #0x73
190 
	str	r3, [r12,#0x58]      @ PWRCON(2)
 195 
	str	r3, [r12,#0x58]      @ PWRCON(2)
191 
	str	r2, [r12,#0x6c]      @ PWRCON(4)				  @ R2: Unused
 196 
	str	r2, [r12,#0x6c]      @ PWRCON(4)                                  @ R2: Unused
192 
	orr	r10, r11, #0x00800000                                             @ R10: GPIO base address
 197 
	orr	r10, r11, #0x00800000                                             @ R10: GPIO base address
193 
 
 198 
 
194 
	                   @ Block 3 (GPIO) register map:
 199 
                           @ Block 3 (GPIO) register map:
195 
	                   @ R0: Unused
 200 
                           @ R0: Unused
196 
	                   @ R1: Unused
 201 
                           @ R1: Unused
197 
	                   @ R2: Unused
 202 
                           @ R2: Unused
198 
	                   @ R3: Scratchpad
 203 
                           @ R3: Scratchpad
199 
	                   @ R4: -1
 204 
                           @ R4: -1
200 
	                   @ R5: 1
 205 
                           @ R5: 1
201 
	                   @ R6: Unused
 206 
                           @ R6: Unused
202 
	                   @ R7: Unused
 207 
                           @ R7: Unused
203 
	                   @ R8: Unused
 208 
                           @ R8: Unused
204 
	                   @ R9: Unused
 209 
                           @ R9: Unused
205 
	                   @ R10: GPIO base address
 210 
                           @ R10: GPIO base address
206 
	                   @ R11: TIMER base address
 211 
                           @ R11: TIMER base address
207 
	                   @ R12: SYSCON base address
 212 
                           @ R12: SYSCON base address
208 
                           @ R13: Constant pool pointer
 213 
                           @ R13: Constant pool pointer
209 
                           @ R14: 0
 214 
                           @ R14: 0
210 
 
 215 
 
211 
.macro gpio_initdata
 216 
.macro gpio_initdata
212 
	.word	0x3202EEEE @ PCON0
 217 
	.word	0x3202EEEE @ PCON0
Line 225... Line 230...
225 
	.word	0xEEEEEEEE @ PCOND
 230 
	.word	0xEEEEEEEE @ PCOND
226 
	.word	0xEEEEEEEE @ PCONE
 231 
	.word	0xEEEEEEEE @ PCONE
227 
.endm
 232 
.endm
228 
 
 233 
 
229 
	ldr	r3, [sp], #0x4
 234 
	ldr	r3, [sp], #0x4
230 
	str	r3, [r10], #0xc                                       		  @ R10: PCONx iterator
 235 
	str	r3, [r10], #0xc                                                   @ R10: PCONx iterator
231 
	mov	r3, #0x20
 236 
	mov	r3, #0x20
232 
	str	r3, [r10], #0x4     @ PCON0 + 0xc = 0x20
 237 
	str	r3, [r10], #0x4     @ PCON0 + 0xc = 0x20
233 
	mov	r3, #0x40
 238 
	mov	r3, #0x40
234 
	str	r3, [r10], #0x10    @ PCON0 + 0x10 = 0x40
 239 
	str	r3, [r10], #0x10    @ PCON0 + 0x10 = 0x40
235 
	add	r9, r10, #0x1a0                                                   @ R9: Iterator limit
 240 
	add	r9, r10, #0x1a0                                                   @ R9: Iterator limit
Line 238... Line 243...
238 
	str	r3, [r10], #0xc
 243 
	str	r3, [r10], #0xc
239 
	str	lr, [r10], #0x4     @ PCON + 0xc = 0
 244 
	str	lr, [r10], #0x4     @ PCON + 0xc = 0
240 
	str	lr, [r10], #0x10    @ PCON + 0x10 = 0
 245 
	str	lr, [r10], #0x10    @ PCON + 0x10 = 0
241 
	cmp	r10, r9
 246 
	cmp	r10, r9
242 
	bls	gpioloop1
 247 
	bls	gpioloop1
243 
										  @ R10: 0x3CF001E0
 248 
                                                                                  @ R10: 0x3CF001E0
244 
	ldr	r3, [r10,#0x1a8]
 249 
	ldr	r3, [r10,#0x1a8]
245 
	bic	r3, r3, #2
 250 
	bic	r3, r3, #2
246 
	orr	r3, r3, #1
 251 
	orr	r3, r3, #1
247 
	str	r3, [r10,#0x1a8]
 252 
	str	r3, [r10,#0x1a8]
248 
	sub	r8, r11, #0x00300000                                              @ R8: 0x39700000 (iterator)
 253 
	sub	r8, r11, #0x00300000                                              @ R8: 0x39700000 (iterator)
Line 253... Line 258...
253 
	str	r14, [r8,#0xc0]
 258 
	str	r14, [r8,#0xc0]
254 
	str	r14, [r8,#0xe0]
 259 
	str	r14, [r8,#0xe0]
255 
	add	r8, r8, #4
 260 
	add	r8, r8, #4
256 
	subs	r9, r9, #1
 261 
	subs	r9, r9, #1
257 
	bne	gpioloop2
 262 
	bne	gpioloop2
258 
    										  @ R9: 0
 263 
                                                                                  @ R9: 0
259 
	ldr	r8, [r10,#-0x180]						  @ R8: PCON3 backup
 264 
	ldr	r8, [r10,#-0x180]                                                 @ R8: PCON3 backup
260 
	and	r3, r8, #0xff
 265 
	and	r3, r8, #0xff
261 
	str	r3, [r10,#-0x180]   @ *PCON3 &= 0xff
 266 
	str	r3, [r10,#-0x180]   @ *PCON3 &= 0xff
262 
	mov	r0, #0x3e8							  @ R0: Scratchpad
 267 
	mov	r0, #0x3e8                                                        @ R0: Scratchpad
263 
	bl	udelay	                                                          @ R14: Return address
 268 
	bl	udelay                                                            @ R14: Return address
264 
	ldr	r3, [r10,#-0x17c]
 269 
	ldr	r3, [r10,#-0x17c]
265 
	and	r3, r3, #0xfc
 270 
	and	r3, r3, #0xfc
266 
	mov	r6, r3, lsr #0x2                                                  @ R6: Data for first PMU access
 271 
	mov	r6, r3, lsr #0x2                                                  @ R6: Data for first PMU access
267 
	str	r8, [r10,#-0x180]
 272 
	str	r8, [r10,#-0x180]
268 
	bic	r10, r11, #0x00100000                                             @ R10: I2C base address
 273 
	bic	r10, r11, #0x00100000                                             @ R10: I2C base address
269 
 
 274 
 
270 
	                   @ Block 4 (I2C) register map:
 275 
                           @ Block 4 (I2C) register map:
271 
	                   @ R0: Scratchpad
 276 
                           @ R0: Scratchpad
272 
	                   @ R1: Scratchpad
 277 
                           @ R1: Scratchpad
273 
	                   @ R2: Unused
 278 
                           @ R2: Unused
274 
	                   @ R3: Unused
 279 
                           @ R3: Unused
275 
	                   @ R4: -1
 280 
                           @ R4: -1
276 
	                   @ R5: 1
 281 
                           @ R5: 1
277 
	                   @ R6: Data for first PMU access
 282 
                           @ R6: Data for first PMU access
278 
	                   @ R7: Unused
 283 
                           @ R7: Unused
279 
	                   @ R8: Unused
 284 
                           @ R8: Unused
280 
	                   @ R9: 0
 285 
                           @ R9: 0
281 
	                   @ R10: I2C base address
 286 
                           @ R10: I2C base address
282 
	                   @ R11: TIMER base address
 287 
                           @ R11: TIMER base address
283 
	                   @ R12: SYSCON base address
 288 
                           @ R12: SYSCON base address
284 
                           @ R13: Constant pool pointer
 289 
                           @ R13: Constant pool pointer
285 
                           @ R14: Return address / Scratchpad
 290 
                           @ R14: Return address / Scratchpad
286 
 
 291 
 
287 
	bl	i2cwaitrdy
 292 
	bl	i2cwaitrdy
288 
	mov	r1, #0x40
 293 
	mov	r1, #0x40
Line 306... Line 311...
306 
	bl	i2cwaitrdy
 311 
	bl	i2cwaitrdy
307 
	mov	r0, #0x10
 312 
	mov	r0, #0x10
308 
	str	r0, [r10,#0x04]
 313 
	str	r0, [r10,#0x04]
309 
	bl	i2cwaitrdy
 314 
	bl	i2cwaitrdy
310
315
311 
	                   @ Block 5 (PMU) register map:
 316 
                           @ Block 5 (PMU) register map:
312 
	                   @ R0: Address / Scratchpad (trashed by pmubatch)
 317 
                           @ R0: Address / Scratchpad (trashed by pmubatch)
313 
	                   @ R1: Data / Scratchpad (trashed by pmubatch)
 318 
                           @ R1: Data / Scratchpad (trashed by pmubatch)
314 
	                   @ R2: Scratchpad (set to 0xb7 by pmu accesses)
 319 
                           @ R2: Scratchpad (set to 0xb7 by pmu accesses)
315 
	                   @ R3: Scratchpad (set to 0x10 by pmu accesses)
 320 
                           @ R3: Scratchpad (set to 0x10 by pmu accesses)
316 
	                   @ R4: Scratchpad (trashed by pmu accesses)
 321 
                           @ R4: Scratchpad (trashed by pmu accesses)
317 
	                   @ R5: 1
 322 
                           @ R5: 1
318 
	                   @ R6: Data for first PMU access
 323 
                           @ R6: Data for first PMU access
319 
	                   @ R7: Scratchpad (trashed by pmubatch)
 324 
                           @ R7: Scratchpad (trashed by pmubatch)
320 
	                   @ R8: Used to store warmboot flag
 325 
                           @ R8: Used to store warmboot flag
321 
	                   @ R9: 0 / pmubatch transfer count (reset to 0 by pmubatch)
 326 
                           @ R9: 0 / pmubatch transfer count (reset to 0 by pmubatch)
322 
	                   @ R10: I2C base address
 327 
                           @ R10: I2C base address
323 
	                   @ R11: TIMER base address
 328 
                           @ R11: TIMER base address
324 
	                   @ R12: SYSCON base address
 329 
                           @ R12: SYSCON base address
325 
                           @ R13: Constant pool / pmubatch data pointer
 330 
                           @ R13: Constant pool / pmubatch data pointer
326 
                           @ R14: Return address / Scratchpad
 331 
                           @ R14: Return address / Scratchpad
327 
 
 332 
 
328 
	mov	r0, #0x7f
 333 
	mov	r0, #0x7f
329 
	mov	r1, r6
 334 
	mov	r1, r6
Line 342... Line 347...
342 
	.byte	0x0b, 0x22
 347 
	.byte	0x0b, 0x22
343 
pmu_batch_1_end:
 348 
pmu_batch_1_end:
344 
.endm
 349 
.endm
345 
	mov	r9, #(pmu_batch_1_end - pmu_batch_1_begin) / 2
 350 
	mov	r9, #(pmu_batch_1_end - pmu_batch_1_begin) / 2
346 
	bl	pmubatch
 351 
	bl	pmubatch
347 
	tst	r6, #1							          @ R6: Unused
 352 
	tst	r6, #1                                                            @ R6: Unused
348 
	beq	pmu_skip
 353 
	beq	pmu_skip
349 
	mov	r0, #0x0d
 354 
	mov	r0, #0x0d
350 
	bl	pmuread
 355 
	bl	pmuread
351 
	and	r1, r1, #0xdf
 356 
	and	r1, r1, #0xdf
352 
	bl	pmuwrite
 357 
	bl	pmuwrite
Line 365... Line 370...
365 
	bl	pmubatch
 370 
	bl	pmubatch
366 
	mov	r0, #0x10
 371 
	mov	r0, #0x10
367 
	bl	pmuread
 372 
	bl	pmuread
368 
	bic	r1, r1, #0x80
 373 
	bic	r1, r1, #0x80
369 
	orr	r1, r1, #0x60
 374 
	orr	r1, r1, #0x60
370 
nop@	bl	pmuwrite
 375 
	bl	pmuwrite
371 
.macro pmu_batch_3
 376 
.macro pmu_batch_3
372 
pmu_batch_3_begin:
 377 
pmu_batch_3_begin:
373 
	.byte	0x44, 0x72
 378 
	.byte	0x44, 0x72
374 
pmu_batch_3_end:
 379 
pmu_batch_3_end:
375 
.endm
 380 
.endm
Line 419... Line 424...
419 
pmu_batch_5_end:
 424 
pmu_batch_5_end:
420 
.endm
 425 
.endm
421 
	mov	r9, #(pmu_batch_5_end - pmu_batch_5_begin) / 2
 426 
	mov	r9, #(pmu_batch_5_end - pmu_batch_5_begin) / 2
422 
	bl	pmubatch
 427 
	bl	pmubatch
423 
 
 428 
 
424 
	orr	lr, r11, #0x00800000						  @ R14: GPIO base address
 429 
	orr	lr, r11, #0x00800000                                              @ R14: GPIO base address
425 
	str	r9, [lr,#0x384]
 430 
	str	r9, [lr,#0x384]
426 
	orr	lr, r11, #0x01000000						  @ R14: MIU base address
 431 
	orr	lr, r11, #0x01000000                                              @ R14: MIU base address
427 
	str	r5, [lr]
 432 
	str	r5, [lr]
428 
	ldrh	r0, [sp], #2
 433 
	ldrh	r0, [sp], #2
429 
	str	r0, [lr,#0x100]
 434 
	str	r0, [lr,#0x100]
430 
	mov	r0, #0xff
 435 
	mov	r0, #0xff
431 
	str	r0, [lr,#0x11c]
 436 
	str	r0, [lr,#0x11c]
432 
	str	r0, [lr,#0x120]
 437 
	str	r0, [lr,#0x120]
433
438
434 
.macro block6_constpool	   @ Block 6 (SDRAM) register map:
 439 
.macro block6_constpool           @ Block 6 (SDRAM) register map:
435 
	.hword	0x1030
 440 
	.hword	0x1030
436 
	.word	0x008AAC25 @ R0
 441 
	.word	0x008AAC25 @ R0
437 
	.word	0x050D67E5 @ R1
 442 
	.word	0x050D67E5 @ R1
438 
	.word	0x0002000B @ R2
 443 
	.word	0x0002000B @ R2
439 
	.word	0x0003B3B2 @ R3
 444 
	.word	0x0003B3B2 @ R3
440 
	.word	0xFF53B3B0 @ R4
 445 
	.word	0xFF53B3B0 @ R4
441 
	.word	0x00008040 @ R5
 446 
	.word	0x00008040 @ R5
442 
	.word	0x8000100F @ R6: For LCD init at end of block
 447 
	.word	0x8000100F @ R6: For LCD init at end of block
443 
	.word	0x41100DB8 @ R7: For LCD init at end of block
 448 
	.word	0x41100DB8 @ R7: For LCD init at end of block
444 
	                   @ R8: Warmboot flag
 449 
                           @ R8: Warmboot flag
445 
	                   @ R9: 0
 450 
                           @ R9: 0
446 
	                   @ R10: I2C base address
 451 
                           @ R10: I2C base address
447 
	                   @ R11: TIMER base address
 452 
                           @ R11: TIMER base address
448 
	                   @ R12: SYSCON base address
 453 
                           @ R12: SYSCON base address
449 
                           @ R13: Constant pool pointer
 454 
                           @ R13: Constant pool pointer
450 
.endm                      @ R14: MIU base address
 455 
.endm                      @ R14: MIU base address
451 
 
 456 
 
452 
	ldmia	sp!, {r0-r7}
 457 
	ldmia	sp!, {r0-r7}
453 
	str	r0, [lr,#0x114]							  @ R0: Unused
 458 
	str	r0, [lr,#0x114]                                                   @ R0: Unused
454 
	str	r1, [lr,#0x124]							  @ R1: Unused
 459 
	str	r1, [lr,#0x124]                                                   @ R1: Unused
455 
	mov	r0, #0x18							  @ R0: Scratchpad
 460 
	mov	r0, #8                                                            @ R0: Scratchpad
456 
	str	r0, [lr,#0x118]
 461 
	str	r0, [lr,#0x118]
457 
	str	r2, [lr,#0x108]
 462 
	str	r2, [lr,#0x108]
458 
	mov	r0, #4
 463 
	mov	r0, #4
459 
	str	r0, [lr,#0x148]
 464 
	str	r0, [lr,#0x148]
460 
	str	r9, [lr,#0x14c]
 465 
	str	r9, [lr,#0x14c]
461 
	str	r3, [lr,#0x140]
 466 
	str	r3, [lr,#0x140]
462 
miu_wait1:
 467 
miu_wait1:
463 
	ldr	r0, [lr,#0x140]
 468 
	ldr	r0, [lr,#0x140]
464 
	tst	r0, #2
 469 
	tst	r0, #2
465 
	beq	miu_wait1
 470 
	beq	miu_wait1
466 
	add	r0, r3, #1							  @ R3: Unused
 471 
	add	r0, r3, #1                                                        @ R3: Unused
467 
	str	r0, [lr,#0x140]
 472 
	str	r0, [lr,#0x140]
468 
miu_wait2:
 473 
miu_wait2:
469 
	ldr	r0, [lr,#0x144]
 474 
	ldr	r0, [lr,#0x144]
470 
	mvn	r0, r0
 475 
	mvn	r0, r0
471 
	tst	r0, #3
 476 
	tst	r0, #3
472 
	bne	miu_wait2
 477 
	bne	miu_wait2
473 
	ldr	r1, [lr,#0x144]			                                  @ R1: Scratchpad
 478 
	ldr	r1, [lr,#0x144]                                                   @ R1: Scratchpad
474 
	mov	r0, #0x0ff00000
 479 
	mov	r0, #0x0ff00000
475 
	and	r0, r0, r1, lsl #0x2
 480 
	and	r0, r0, r1, lsl#2
476 
	add	r0, r0, r4	                                                  @ R4: Unused
 481 
	add	r0, r0, r4                                                        @ R4: Unused
477 
	str	r0, [lr,#0x140]
 482 
	str	r0, [lr,#0x140]
478 
	mov	r0, #0x10
 483 
	mov	r0, #0x10
479 
	str	r0, [lr,#0x150]
 484 
	str	r0, [lr,#0x150]
480 
	cmp	r8, #0								  @ R8: Unused
 485 
	cmp	r8, #0                                                            @ R8: Unused
481 
	sub	r8, r10, #0x04300000                                              @ R8: LCD base address
 486 
	sub	r8, r10, #0x04300000                                              @ R8: LCD base address
482 
	str	r6, [r12,#0x08]                                                   @ R6: Unused
 487 
	str	r6, [r12,#0x08]                                                   @ R6: Unused
483 
	str	r7, [r8]                                                          @ R7: Unused
 488 
	str	r7, [r8]                                                          @ R7: Unused
484 
	mov	r0, #0x11
 489 
	mov	r0, #0x11
485 
	str	r0, [r8,#0x20]
 490 
	str	r0, [r8,#0x20]
486 
	mov	r3, #0x33							  @ R3: 0x33
 491 
	mov	r3, #0x33                                                         @ R3: 0x33
487 
	beq	miu_coldboot
 492 
	beq	miu_coldboot
488 
	str	r0, [lr,#0x104]
 493 
	str	r0, [lr,#0x104]
489 
	b	miu_common
 494 
	b	miu_common
490 
miu_coldboot:
 495 
miu_coldboot:
491 
	str	r3, [lr,#0x104]
 496 
	str	r3, [lr,#0x104]
Line 514... Line 519...
514 
	bne	miu_wait5
 519 
	bne	miu_wait5
515 
	str	r3, [lr,#0x104]
 520 
	str	r3, [lr,#0x104]
516 
	str	r3, [lr,#0x104]
 521 
	str	r3, [lr,#0x104]
517 
	str	r3, [lr,#0x104]
 522 
	str	r3, [lr,#0x104]
518 
	str	r3, [lr,#0x110]
 523 
	str	r3, [lr,#0x110]
519 
	orr	r1, r3, #0x100
 524 
	orr	r0, r3, #0x100
520 
	str	r1, [lr,#0x104]
 525 
	str	r0, [lr,#0x104]
521 
miu_wait6:
 526 
miu_wait6:
522 
	ldr	r0, [lr,#0x104]
 527 
	ldr	r0, [lr,#0x104]
523 
	tst	r0, #0x110000
 528 
	tst	r0, #0x110000
524 
	bne	miu_wait6
 529 
	bne	miu_wait6
525 
	str	r3, [lr,#0x104]
 530 
	str	r3, [lr,#0x104]
526 
	str	r3, [lr,#0x104]
 531 
	str	r3, [lr,#0x104]
527 
	str	r3, [lr,#0x104]
 532 
	str	r3, [lr,#0x104]
528 
	str	r5, [lr,#0x110]							  @ R5: Unused
 533 
	str	r5, [lr,#0x110]                                                   @ R5: Unused
529 
	str	r1, [lr,#0x104]
 534 
	str	r1, [lr,#0x104]
530 
miu_wait7:
 535 
miu_wait7:
531 
	ldr	r0, [lr,#0x104]
 536 
	ldr	r0, [lr,#0x104]
532 
	tst	r0, #0x110000
 537 
	tst	r0, #0x110000
533 
	bne	miu_wait7
 538 
	bne	miu_wait7
534 
	str	r3, [lr,#0x104]
 539 
	str	r3, [lr,#0x104]
535 
	str	r3, [lr,#0x104]
 540 
	str	r3, [lr,#0x104]
536 
miu_common:
 541 
miu_common:
537 
	str	r3, [lr,#0x104]							  @ R3: Unused
 542 
	str	r3, [lr,#0x104]                                                   @ R3: Unused
538 
	mov	r0, #0x40
 543 
	mov	r0, #0x40
539 
	str	r0, [lr,#0x10c]
 544 
	str	r0, [lr,#0x10c]
540 
	ldr	r0, [lr,#0x100]
 545 
	ldr	r0, [lr,#0x100]
541 
	orr	r0, r0, #0x9100000
 546 
	orr	r0, r0, #0x9100000
542 
	str	r0, [lr,#0x100]
 547 
	str	r0, [lr,#0x100]
543 
	mov	r0, #0x19
 548 
	mov	r0, #0x19
544 
	str	r0, [lr,#0x11c]
 549 
	str	r0, [lr,#0x11c]
545 
	mov	r0, #1
 550 
	mov	r0, #1
546 
	str	r0, [lr,#0x120]
 551 
	str	r0, [lr,#0x120]
547 
	orr	r1, r2, #0x1000							  @ R2: Unused
 552 
	orr	r1, r2, #0x1000                                                   @ R2: Unused
548 
	str	r1, [lr,#0x108]
 553 
	str	r1, [lr,#0x108]
549 
	str	r0, [lr,#0x08]
 554 
	str	r0, [lr,#0x08]
550 
	mov	r1, #0x3e000000
 555 
	mov	r1, #0x3e000000
551 
	mov	r0, #0x1f
 556 
	mov	r0, #0x1f
552 
	str	r0, [r1,#0x08]
 557 
	str	r0, [r1,#0x08]
553 
 
 558 
 
554 
                           @ Block 7 (LCD) register map:
 559 
                           @ Block 7 (LCD) register map:
555 
	                   @ R0: Cmd/Data to be written / Scratchpad
 560 
                           @ R0: Cmd/Data to be written / Scratchpad
556 
                           @ R1: Scratchpad
 561 
                           @ R1: Scratchpad
557 
                           @ R2: Scratchpad
 562 
                           @ R2: Scratchpad
558 
                           @ R3: Scratchpad
 563 
                           @ R3: Scratchpad
559 
                           @ R4: Scratchpad
 564 
                           @ R4: Scratchpad
560 
                           @ R5: Scratchpad
 565 
                           @ R5: Scratchpad
561 
                           @ R6: Unused
 566 
                           @ R6: Unused
562 
                           @ R7: Unused
 567 
                           @ R7: Unused
563 
	                   @ R8: LCD base address
 568 
                           @ R8: LCD base address
564 
	                   @ R9: 0
 569 
                           @ R9: 0
565 
	                   @ R10: I2C base address
 570 
                           @ R10: I2C base address
566 
	                   @ R11: TIMER base address
 571 
                           @ R11: TIMER base address
567 
	                   @ R12: SYSCON base address
 572 
                           @ R12: SYSCON base address
568 
                           @ R13: LCD init script pointer / Scratchpad
 573 
                           @ R13: LCD init script pointer / Scratchpad
569 
                           @ R14: Return address / Scratchpad
 574 
                           @ R14: Return address / Scratchpad
570 
 
 575 
 
571 
.macro lcd_sequences
 576 
.macro lcd_sequences
572 
lcd_sequences_begin:
 577 
lcd_sequences_begin:
573 
	.word	lcd_sequence_c4 - lcd_sequences_begin
 578 
	.word	lcd_sequence_c4 - lcd_sequences_begin
574 
	.word	lcd_sequence_d5 - lcd_sequences_begin
 579 
	.word	lcd_sequence_d5 - lcd_sequences_begin
575 
	.word	lcd_sequence_e6 - lcd_sequences_begin
 580 
	.word	lcd_sequence_e6 - lcd_sequences_begin
576 
	.word	lcd_sequence_b3 - lcd_sequences_begin
 581 
	.word	lcd_sequence_b3 - lcd_sequences_begin
577 
lcd_sequence_b3:
 582 
lcd_sequence_b3:
- 
 
 583 
.byte 0x01, 0x11, 0xf8, 0x01, 0x13, 0x01, 0x29, 0x80
578 
	.byte	0x01, 0x11
 584 
	.byte	0x01, 0x11
579 
	.byte	0xf8
 585 
	.byte	0xf8
580 
	.byte	0x02, 0xfe, 0x00
 586 
	.byte	0x02, 0xfe, 0x00
581 
	.byte	0x02, 0xef, 0x80
 587 
	.byte	0x02, 0xef, 0x80
582 
	.byte	0x02, 0xc0, 0x0c
 588 
	.byte	0x02, 0xc0, 0x0c
Line 595... Line 601...
595 
	.byte	0x0c, 0xe0, 0x0f, 0x42, 0x24, 0x01, 0x00, 0x02, 0xa6, 0x98, 0x05, 0x04, 0x15
 601 
	.byte	0x0c, 0xe0, 0x0f, 0x42, 0x24, 0x01, 0x00, 0x02, 0xa6, 0x98, 0x05, 0x04, 0x15
596 
	.byte	0x0c, 0xe1, 0x00, 0x21, 0x44, 0x02, 0x0f, 0x05, 0x89, 0x6a, 0x02, 0x15, 0x04
 602 
	.byte	0x0c, 0xe1, 0x00, 0x21, 0x44, 0x02, 0x0f, 0x05, 0x89, 0x6a, 0x02, 0x15, 0x04
597 
	.byte	0x0c, 0xe2, 0x7e, 0x04, 0x43, 0x40, 0x00, 0x02, 0x13, 0x00, 0x00, 0x01, 0x0b
 603 
	.byte	0x0c, 0xe2, 0x7e, 0x04, 0x43, 0x40, 0x00, 0x02, 0x13, 0x00, 0x00, 0x01, 0x0b
598 
	.byte	0x0c, 0xe3, 0x40, 0x40, 0x03, 0x74, 0x0e, 0x00, 0x00, 0x31, 0x02, 0x0b, 0x01
 604 
	.byte	0x0c, 0xe3, 0x40, 0x40, 0x03, 0x74, 0x0e, 0x00, 0x00, 0x31, 0x02, 0x0b, 0x01
599 
	.byte	0x0c, 0xe4, 0x5a, 0x43, 0x67, 0x56, 0x00, 0x02, 0x67, 0x72, 0x00, 0x05, 0x12
 605 
	.byte	0x0c, 0xe4, 0x5a, 0x43, 0x67, 0x56, 0x00, 0x02, 0x67, 0x72, 0x00, 0x05, 0x12
600 
	.byte	0x0c, 0xe5, 0x50, 0x66, 0x47, 0x53, 0x0a, 0x00, 0x27, 0x76, 0x02, 0x12, 0x02
 606 
	.byte	0x0c, 0xe5, 0x50, 0x66, 0x47, 0x53, 0x0a, 0x00, 0x27, 0x76, 0x02, 0x12, 0x05
601 
	.byte	0x02, 0x3a, 0x06
 607 
	.byte	0x02, 0x3a, 0x06
602 
	.byte	0x01, 0x13
 608 
	.byte	0x01, 0x13
603 
	.byte	0x01, 0x29
 609 
	.byte	0x01, 0x29
604 
	.byte	0x80
 610 
	.byte	0x80
605 
lcd_sequence_c4:
 611 
lcd_sequence_c4:
- 
 
 612 
.byte 0x01, 0x01, 0x85, 0x01, 0x11, 0x01, 0x29, 0x80
606 
	.byte	0x01, 0x01
 613 
	.byte	0x01, 0x01
607 
	.byte	0x85
 614 
	.byte	0x85
608 
	.byte	0x02, 0xc0, 0x00
 615 
	.byte	0x02, 0xc0, 0x00
609 
	.byte	0x02, 0xc1, 0x03
 616 
	.byte	0x02, 0xc1, 0x03
610 
	.byte	0x02, 0xc2, 0x34
 617 
	.byte	0x02, 0xc2, 0x34
611 
	.byte	0x03, 0xc3, 0x72, 0x03
 618 
	.byte	0x03, 0xc3, 0x72, 0x03
612 
	.byte	0x03, 0xc4, 0x73, 0x03
 619 
	.byte	0x03, 0xc4, 0x73, 0x03
613 
	.byte	0x03, 0xc5, 0x3c, 0x3c
 620 
	.byte	0x03, 0xc5, 0x3c, 0x3c
614 
	.byte	0x02, 0xfe, 0x00
 621 
	.byte	0x02, 0xfe, 0x00
615 
@	.byte	0x03, 0xb1, 0x6a, 0x15
 622 
	.byte	0x03, 0xb1, 0x6a, 0x15
616 
	.byte	0x03, 0xb2, 0x6a, 0x15
 623 
	.byte	0x03, 0xb2, 0x6a, 0x15
617 
	.byte	0x03, 0xb3, 0x6a, 0x15
 624 
	.byte	0x03, 0xb3, 0x6a, 0x15
618 
	.byte	0x02, 0xb4, 0x02
 625 
	.byte	0x02, 0xb4, 0x02
619 
	.byte	0x03, 0xb6, 0x12, 0x02
 626 
	.byte	0x03, 0xb6, 0x12, 0x02
620 
	.byte	0x02, 0x35, 0x00
 627 
	.byte	0x02, 0x35, 0x00
Line 623... Line 630...
623 
	.byte	0x0c, 0xe1, 0x0d, 0x00, 0x23, 0x66, 0x0f, 0x15, 0x4d, 0x85, 0x08, 0x02, 0x10
 630 
	.byte	0x0c, 0xe1, 0x0d, 0x00, 0x23, 0x66, 0x0f, 0x15, 0x4d, 0x85, 0x08, 0x02, 0x10
624 
	.byte	0x0c, 0xe2, 0x39, 0x60, 0x77, 0x05, 0x03, 0x07, 0x96, 0x64, 0x0d, 0x1a, 0x0a
 631 
	.byte	0x0c, 0xe2, 0x39, 0x60, 0x77, 0x05, 0x03, 0x07, 0x96, 0x64, 0x0d, 0x1a, 0x0a
625 
	.byte	0x0c, 0xe3, 0x3f, 0x10, 0x16, 0x44, 0x0e, 0x04, 0x6c, 0x44, 0x04, 0x03, 0x0b
 632 
	.byte	0x0c, 0xe3, 0x3f, 0x10, 0x16, 0x44, 0x0e, 0x04, 0x6c, 0x44, 0x04, 0x03, 0x0b
626 
	.byte	0x0c, 0xe4, 0x00, 0x61, 0x77, 0x04, 0x02, 0x04, 0x72, 0x32, 0x09, 0x19, 0x06
 633 
	.byte	0x0c, 0xe4, 0x00, 0x61, 0x77, 0x04, 0x02, 0x04, 0x72, 0x32, 0x09, 0x19, 0x06
627 
	.byte	0x0c, 0xe5, 0x4f, 0x42, 0x27, 0x67, 0x0f, 0x02, 0x26, 0x33, 0x01, 0x03, 0x09
 634 
	.byte	0x0c, 0xe5, 0x4f, 0x42, 0x27, 0x67, 0x0f, 0x02, 0x26, 0x33, 0x01, 0x03, 0x09
628 
@	.byte	0x02, 0x3a, 0x66
 635 
	.byte	0x02, 0x3a, 0x66
629 
	.byte	0x02, 0x36, 0x00
 636 
	.byte	0x02, 0x36, 0x00
630 
	.byte	0x01, 0x11
 637 
	.byte	0x01, 0x11
631 
	.byte	0x01, 0x29
 638 
	.byte	0x01, 0x29
632 
	.byte	0x80
 639 
	.byte	0x80
633 
lcd_sequence_d5:
 640 
lcd_sequence_d5:
- 
 
 641 
.byte 0x01, 0x01, 0x85, 0x01, 0x11, 0x01, 0x29, 0x80
634 
	.byte	0x02, 0xfe, 0x00
 642 
	.byte	0x02, 0xfe, 0x00
635 
	.byte	0x02, 0xc0, 0x01
 643 
	.byte	0x02, 0xc0, 0x01
636 
	.byte	0x02, 0xc1, 0x01
 644 
	.byte	0x02, 0xc1, 0x01
637 
	.byte	0x03, 0xc2, 0x03, 0x00
 645 
	.byte	0x03, 0xc2, 0x03, 0x00
638 
	.byte	0x03, 0xc3, 0x01, 0x00
 646 
	.byte	0x03, 0xc3, 0x01, 0x00
Line 656... Line 664...
656 
	.byte	0x02, 0x36, 0x00
 664 
	.byte	0x02, 0x36, 0x00
657 
	.byte	0x01, 0x11
 665 
	.byte	0x01, 0x11
658 
	.byte	0x01, 0x29
 666 
	.byte	0x01, 0x29
659 
	.byte	0x80
 667 
	.byte	0x80
660 
lcd_sequence_e6:
 668 
lcd_sequence_e6:
- 
 
 669 
.byte 0x01, 0x11, 0xf8, 0x01, 0x13, 0x01, 0x29, 0x80
661 
	.byte	0x01, 0x11
 670 
	.byte	0x01, 0x11
662 
	.byte	0xf8
 671 
	.byte	0xf8
663 
	.byte	0x02, 0xfe, 0x00
 672 
	.byte	0x02, 0xfe, 0x00
664 
	.byte	0x02, 0xef, 0x80
 673 
	.byte	0x02, 0xef, 0x80
665 
	.byte	0x02, 0xc0, 0x13
 674 
	.byte	0x02, 0xc0, 0x13
Line 713... Line 722...
713 
	beq	lcdloop
 722 
	beq	lcdloop
714 
	ldrb	r0, [sp], #1
 723 
	ldrb	r0, [sp], #1
715 
	bl	sendlcdd
 724 
	bl	sendlcdd
716 
	b	lcdbyte
 725 
	b	lcdbyte
717 
 
 726 
 
- 
 
 727 
values1:
- 
 
 728 
	block0_constpool
- 
 
 729 
	block1_constpool
- 
 
 730 
	gpio_initdata
- 
 
 731 
	pmu_batch_1
- 
 
 732 
	pmu_batch_2
- 
 
 733 
	pmu_batch_3
- 
 
 734 
	pmu_batch_4
- 
 
 735 
	pmu_batch_5
- 
 
 736 
	block6_constpool
- 
 
 737 
	lcd_sequences
- 
 
 738 
	.align	2
- 
 
 739 
 
718 
	                   @ udelay register map:
 740 
                           @ udelay register map:
719 
	                   @ R0: Microseconds
 741 
                           @ R0: Microseconds
720 
	                   @ R1: Trashed
 742 
                           @ R1: Trashed
721 
	                   @ R11: TIMER base address
 743 
                           @ R11: TIMER base address
722 
                           @ R14: Return address
 744 
                           @ R14: Return address
723 
 
 745 
 
724 
udelay:
 746 
udelay:
725 
	ldr	r1, [r11,#0xb4]
 747 
	ldr	r1, [r11,#0xb4]
726 
	add	r0, r0, r1
 748 
	add	r0, r0, r1
Line 728... Line 750...
728 
	ldr	r1, [r11,#0xb4]
 750 
	ldr	r1, [r11,#0xb4]
729 
	cmp	r1, r0
 751 
	cmp	r1, r0
730 
	bmi	udelayloop
 752 
	bmi	udelayloop
731 
	mov	pc, lr
 753 
	mov	pc, lr
732 
 
 754 
 
733 
	                   @ i2cwaitrdy register map:
 755 
                           @ i2cwaitrdy register map:
734 
	                   @ R9: Set to 0
 756 
                           @ R9: Set to 0
735 
	                   @ R10: I2C base address
 757 
                           @ R10: I2C base address
736 
                           @ R14: Return address
 758 
                           @ R14: Return address
737 
 
 759 
 
738 
i2cwaitrdy:
 760 
i2cwaitrdy:
739 
	ldr	r9, [r10,#0x10]
 761 
	ldr	r9, [r10,#0x10]
740 
	cmp	r9, #0
 762 
	cmp	r9, #0
741 
	bne	i2cwaitrdy
 763 
	bne	i2cwaitrdy
742 
	mov	pc, lr
 764 
	mov	pc, lr
743 
 
 765 
 
744 
	                   @ i2cwait register map:
 766 
                           @ i2cwait register map:
745 
	                   @ R3: Set to 0x10
 767 
                           @ R3: Set to 0x10
746 
	                   @ R10: I2C base address
 768 
                           @ R10: I2C base address
747 
                           @ R14: Return address
 769 
                           @ R14: Return address
748 
 
 770 
 
749 
i2cwait:
 771 
i2cwait:
750 
	ldr	r3, [r10]
 772 
	ldr	r3, [r10]
751 
	ands	r3, #0x10
 773 
	ands	r3, #0x10
752 
	beq	i2cwait
 774 
	beq	i2cwait
753 
	mov	pc, lr
 775 
	mov	pc, lr
754 
 
 776 
 
755 
	                   @ pmuwrite register map:
 777 
                           @ pmuwrite register map:
756 
	                   @ R0: Address
 778 
                           @ R0: Address
757 
	                   @ R1: Data
 779 
                           @ R1: Data
758 
			   @ R2: Set to 0xb7
 780 
                           @ R2: Set to 0xb7
759 
	                   @ R3: Set to 0x10
 781 
                           @ R3: Set to 0x10
760 
	                   @ R4: Return address backup
 782 
                           @ R4: Return address backup
761 
	                   @ R10: I2C base address
 783 
                           @ R10: I2C base address
762 
                           @ R14: Return address / Scratchpad
 784 
                           @ R14: Return address / Scratchpad
763 
 
 785 
 
764 
pmuwrite:
 786 
pmuwrite:
765 
	mov	r4, lr
 787 
	mov	r4, lr
766 
	mov	lr, #0xe6
 788 
	mov	lr, #0xe6
Line 783... Line 805...
783 
	ldr	lr, [r10,#0x04]
 805 
	ldr	lr, [r10,#0x04]
784 
	tst	lr, #0x20
 806 
	tst	lr, #0x20
785 
	bne	pmuwrite_wait
 807 
	bne	pmuwrite_wait
786 
	mov	pc, r4
 808 
	mov	pc, r4
787 
 
 809 
 
788 
	                   @ pmuread register map:
 810 
                           @ pmuread register map:
789 
	                   @ R0: Address
 811 
                           @ R0: Address
790 
	                   @ R1: Data
 812 
                           @ R1: Data
791 
			   @ R2: Set to 0xb7
 813 
                           @ R2: Set to 0xb7
792 
	                   @ R3: Set to 0x10
 814 
                           @ R3: Set to 0x10
793 
	                   @ R4: Return address backup
 815 
                           @ R4: Return address backup
794 
	                   @ R10: I2C base address
 816 
                           @ R10: I2C base address
795 
                           @ R14: Return address / Scratchpad
 817 
                           @ R14: Return address / Scratchpad
796 
 
 818 
 
797 
pmuread:
 819 
pmuread:
798 
	mov	r4, lr
 820 
	mov	r4, lr
799 
	mov	lr, #0xe6
 821 
	mov	lr, #0xe6
Line 818... Line 840...
818 
	ldr	r1, [r10,#0x0c]
 840 
	ldr	r1, [r10,#0x0c]
819 
	mov	lr, #0x90
 841 
	mov	lr, #0x90
820 
	str	lr, [r10,#0x04]
 842 
	str	lr, [r10,#0x04]
821 
	str	r2, [r10]
 843 
	str	r2, [r10]
822 
pmuread_wait:
 844 
pmuread_wait:
823 
	ldr	r1, [r10,#0x04]
 845 
	ldr	lr, [r10,#0x04]
824 
	tst	r1, #0x20
 846 
	tst	lr, #0x20
825 
	bne	pmuread_wait
 847 
	bne	pmuread_wait
826 
	mov	pc, r4
 848 
	mov	pc, r4
827 
 
 849 
 
828 
	                   @ pmubatch register map:
 850 
                           @ pmubatch register map:
829 
	                   @ R0: Scratchpad
 851 
                           @ R0: Scratchpad
830 
	                   @ R1: Scratchpad
 852 
                           @ R1: Scratchpad
831 
			   @ R2: Set to 0xb7
 853 
                           @ R2: Set to 0xb7
832 
	                   @ R3: Set to 0x10
 854 
                           @ R3: Set to 0x10
833 
	                   @ R4: Inner return address backup
 855 
                           @ R4: Inner return address backup
834 
			   @ R7: Outer return address backup
 856 
                           @ R7: Outer return address backup
835 
			   @ R9: Number of address-data pairs to be sent (must be >0), will be reset to 0
 857 
                           @ R9: Number of address-data pairs to be sent (must be >0), will be reset to 0
836 
	                   @ R10: I2C base address
 858 
                           @ R10: I2C base address
837 
                           @ R13: Address-data pair list pointer (will be incremented)
 859 
                           @ R13: Address-data pair list pointer (will be incremented)
838 
                           @ R14: Return address / Scratchpad
 860 
                           @ R14: Return address / Scratchpad
839 
 
 861 
 
840 
pmubatch:
 862 
pmubatch:
841 
	mov	r7, lr
 863 
	mov	r7, lr
Line 845... Line 867...
845 
	bl	pmuwrite
 867 
	bl	pmuwrite
846 
	subs	r9, r9, #1
 868 
	subs	r9, r9, #1
847 
	bne	pmubatch_loop
 869 
	bne	pmubatch_loop
848 
	mov	pc, r7
 870 
	mov	pc, r7
849 
 
 871 
 
850 
	                   @ sendlcdc register map:
 872 
                           @ sendlcdc register map:
851 
	                   @ R0: Command to be sent
 873 
                           @ R0: Command to be sent
852 
	                   @ R8: LCD base address
 874 
                           @ R8: LCD base address
853 
			   @ R9: Will be set to 0
 875 
                           @ R9: Will be set to 0
854 
                           @ R14: Return address
 876 
                           @ R14: Return address
855 
 
 877 
 
856 
sendlcdc:
 878 
sendlcdc:
857 
	ldr	r9, [r8,#0x1c]
 879 
	ldr	r9, [r8,#0x1c]
858 
	ands	r9, r9, #0x10
 880 
	ands	r9, r9, #0x10
859 
	bne	sendlcdc
 881 
	bne	sendlcdc
860 
	str	r0, [r8,#0x04]
 882 
	str	r0, [r8,#0x04]
861 
	mov	pc, lr
 883 
	mov	pc, lr
862 
 
 884 
 
863 
	                   @ sendlcdd register map:
 885 
                           @ sendlcdd register map:
864 
	                   @ R0: Data to be sent
 886 
                           @ R0: Data to be sent
865 
	                   @ R8: LCD base address
 887 
                           @ R8: LCD base address
866 
			   @ R9: Will be set to 0
 888 
                           @ R9: Will be set to 0
867 
                           @ R14: Return address
 889 
                           @ R14: Return address
868 
 
 890 
 
869 
sendlcdd:
 891 
sendlcdd:
870 
	ldr	r9, [r8,#0x1c]
 892 
	ldr	r9, [r8,#0x1c]
871 
	ands	r9, r9, #0x10
 893 
	ands	r9, r9, #0x10
872 
	bne	sendlcdd
 894 
	bne	sendlcdd
873 
	str	r0, [r8,#0x40]
 895 
	str	r0, [r8,#0x40]
874 
	mov	pc, lr
 896 
	mov	pc, lr
875
897
876 
	                   @ readlcd register map:
 898 
                           @ readlcd register map:
877 
	                   @ R0: Result data
 899 
                           @ R0: Result data
878 
	                   @ R8: LCD base address
 900 
                           @ R8: LCD base address
879 
                           @ R14: Return address
 901 
                           @ R14: Return address
880 
 
 902 
 
881 
readlcd:
 903 
readlcd:
882 
	ldr	r0, [r8,#0x1c]
 904 
	ldr	r0, [r8,#0x1c]
883 
	tst	r0, #2
 905 
	tst	r0, #2
Line 890... Line 912...
890 
	ldr	r0, [r8,#0x14]
 912 
	ldr	r0, [r8,#0x14]
891 
	mov	r0, r0,lsr#1
 913 
	mov	r0, r0,lsr#1
892 
	mov	pc, lr
 914 
	mov	pc, lr
893 
 
 915 
 
894 
lcddone:
 916 
lcddone:
- 
 
 917 
	bic	r1, r10, #0x04400000
- 
 
 918 
	mov	r0, #1
- 
 
 919 
	str	r0, [r1,#0x30]
895 
	ldr	r0, _stubend
 920 
	ldr	r0, _stubend
896 
	adr	r1, _stubend + 4
 921 
	adr	r1, _stubend + 4
897 
	mov	r2, #0x08000000
 922 
	mov	r2, #0x08000000
898 
	add	r0, r1, r0
 923 
	add	r0, r1, r0
899 
movepayloadloop:
 924 
movepayloadloop:
900 
	cmp	r0, r1
 925 
	cmp	r0, r1
901 
	ldrhi	r3, [r1], #4
 926 
	ldrhi	r3, [r1], #4
902 
	strhi	r3, [r2], #4
 927 
	strhi	r3, [r2], #4
903 
	bhi	movepayloadloop
 928 
	bhi	movepayloadloop
904 
	mcr	p15, 0, r9,c7,c14,0 @ clean & invalidate data cache
 929 
	mcr	p15, 0, r9,c7,c14,0 @ clean data cache
905 
	mcr	p15, 0, r9,c7,c10,4 @ drain write buffer
 930 
	mcr	p15, 0, r9,c7,c10,4 @ drain write buffer
906 
	mcr	p15, 0, r9,c7,c5    @ invalidate instruction cache
 931 
	mcr	p15, 0, r9,c7,c5,0  @ invalidate instruction cache
- 
 
 932 
	mcr	p15, 0, r9,c7,c5,4  @ flush prefetch buffer
907 
	mov	pc, #0x08000000
 933 
	mov	pc, #0x08000000
908 
 
 934 
 
909 
values1:
 - 
 
910 
	block0_constpool
 - 
 
911 
	block1_constpool
 - 
 
912 
	gpio_initdata
 - 
 
913 
	pmu_batch_1
 - 
 
914 
	pmu_batch_2
 - 
 
915 
	pmu_batch_3
 - 
 
916 
	pmu_batch_4
 - 
 
917 
	pmu_batch_5
 - 
 
918 
	block6_constpool
 - 
 
919 
	lcd_sequences
 - 
 
920 
	.align	2
 - 
 
921 
 
 - 
 
922 
_stubend:
 935 
_stubend: