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#include "global.h"
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#include "core/synopsysotg/synopsysotg.h"
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#include "soc/s5l87xx/regs.h"
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#include "soc/s5l87xx/clockgate.h"
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#include "soc/s5l87xx/irq.h"
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#include "sys/time.h"
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static const struct usb_instance* synopsysotg_instance;
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void synopsysotg_target_enable_clocks(const struct usb_instance* instance)
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{
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const struct synopsysotg_config* data = (const struct synopsysotg_config*)instance->driver_config;
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clockgate_enable(CLOCKGATE_USB_1, true);
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clockgate_enable(CLOCKGATE_USB_2, true);
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data->core->pcgcctl.d32 = 0;
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*((volatile uint32_t*)(PHYBASE + 0x00)) = 0; /* PHY: Power up */
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udelay(10);
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*((volatile uint32_t*)(PHYBASE + 0x1c)) = 1;
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*((volatile uint32_t*)(PHYBASE + 0x44)) = 0xe3f;
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*((volatile uint32_t*)(PHYBASE + 0x08)) = 1; /* PHY: Assert Software Reset */
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udelay(10);
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*((volatile uint32_t*)(PHYBASE + 0x08)) = 0; /* PHY: Deassert Software Reset */
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udelay(10);
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*((volatile uint32_t*)(PHYBASE + 0x18)) = 0x600;
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*((volatile uint32_t*)(PHYBASE + 0x04)) = SYNOPSYSOTG_CLOCK;
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udelay(400);
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}
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void synopsysotg_target_disable_clocks(const struct usb_instance* instance)
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{
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*((volatile uint32_t*)(PHYBASE + 0x00)) = 0xf; /* PHY: Power down */
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udelay(10);
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*((volatile uint32_t*)(PHYBASE + 0x08)) = 7; /* PHY: Assert Software Reset */
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udelay(10);
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const struct synopsysotg_config* data = (const struct synopsysotg_config*)instance->driver_config;
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data->core->pcgcctl.d32 = 0;
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clockgate_enable(CLOCKGATE_USB_1, false);
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clockgate_enable(CLOCKGATE_USB_2, false);
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}
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void synopsysotg_target_enable_irq(const struct usb_instance* instance)
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{
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synopsysotg_instance = instance;
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s5l87xx_irq_enable(IRQ_USB_FUNC, true);
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}
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void synopsysotg_target_disable_irq(const struct usb_instance* instance)
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{
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s5l87xx_irq_enable(IRQ_USB_FUNC, false);
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}
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void synopsysotg_target_clear_irq(const struct usb_instance* instance)
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{
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}
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void int_usb_func_irqhandler()
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{
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synopsysotg_irq(synopsysotg_instance);
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}
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void __attribute__((weak)) synopsysotg_irq(const struct usb_instance* instance)
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{
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synopsysotg_target_disable_irq(instance);
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}
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