| 881 |
theseven |
1 |
#include "global.h"
|
|
|
2 |
#include "soc/s5l87xx/i2c.h"
|
|
|
3 |
#include "soc/s5l87xx/clockgate.h"
|
|
|
4 |
#include "soc/s5l87xx/regs.h"
|
|
|
5 |
#include "protocol/i2c/i2c.h"
|
|
|
6 |
#include "sys/util.h"
|
|
|
7 |
|
|
|
8 |
|
|
|
9 |
#ifdef SOC_S5L8702
|
|
|
10 |
#define I2C_WAIT() while (IIC10(bus))
|
|
|
11 |
#else
|
|
|
12 |
#define I2C_WAIT()
|
|
|
13 |
#endif
|
|
|
14 |
|
|
|
15 |
|
|
|
16 |
static enum i2c_result s5l87xx_i2c_init(const struct i2c_driver_instance* instance)
|
|
|
17 |
{
|
|
|
18 |
#ifdef SOC_S5L8701
|
|
|
19 |
PCON10 = 5;
|
|
|
20 |
#endif
|
|
|
21 |
return I2C_RESULT_OK;
|
|
|
22 |
}
|
|
|
23 |
|
|
|
24 |
static void s5l87xx_i2c_send_byte(int bus, uint8_t byte)
|
|
|
25 |
{
|
|
|
26 |
I2C_WAIT();
|
|
|
27 |
IICDS(bus) = byte;
|
|
|
28 |
I2C_WAIT();
|
|
|
29 |
IICCON(bus) = 0xb7;
|
|
|
30 |
I2C_WAIT();
|
|
|
31 |
while (!(IICCON(bus) & 0x10));
|
|
|
32 |
}
|
|
|
33 |
|
|
|
34 |
static uint8_t s5l87xx_i2c_recv_byte(int bus, bool ack)
|
|
|
35 |
{
|
|
|
36 |
I2C_WAIT();
|
|
|
37 |
IICCON(bus) = ack ? 0xb7 : 0x37;
|
|
|
38 |
I2C_WAIT();
|
|
|
39 |
while (!(IICCON(bus) & 0x10));
|
|
|
40 |
return IICDS(bus);
|
|
|
41 |
}
|
|
|
42 |
|
|
|
43 |
static void s5l87xx_i2c_send_start(int bus, int addr, bool tx)
|
|
|
44 |
{
|
|
|
45 |
uint8_t byte;
|
|
|
46 |
if (addr > 0x77) byte = (0x78 | (addr >> 8));
|
|
|
47 |
else byte = addr;
|
|
|
48 |
I2C_WAIT();
|
|
|
49 |
IICDS(bus) = (byte << 1) | !!tx;
|
|
|
50 |
I2C_WAIT();
|
|
|
51 |
IICSTAT(bus) = 0xf0;
|
|
|
52 |
I2C_WAIT();
|
|
|
53 |
IICCON(bus) = 0xb7;
|
|
|
54 |
I2C_WAIT();
|
|
|
55 |
while (!(IICCON(bus) & 0x10));
|
|
|
56 |
if (tx && addr > 0x77) s5l87xx_i2c_send_byte(bus, addr);
|
|
|
57 |
}
|
|
|
58 |
|
|
|
59 |
static void s5l87xx_i2c_send_stop(int bus)
|
|
|
60 |
{
|
|
|
61 |
I2C_WAIT();
|
|
|
62 |
IICSTAT(bus) = 0x90;
|
|
|
63 |
I2C_WAIT();
|
|
|
64 |
IICCON(bus) = 0xb7;
|
|
|
65 |
I2C_WAIT();
|
|
|
66 |
while (IICSTAT(bus) & (1 << 5));
|
|
|
67 |
}
|
|
|
68 |
|
|
|
69 |
static enum i2c_result s5l87xx_i2c_txn(const struct i2c_driver_instance* instance, const struct i2c_transaction* txn)
|
|
|
70 |
{
|
|
|
71 |
const struct s5l87xx_i2c_driver_config* config = (const struct s5l87xx_i2c_driver_config*)instance->driver_config;
|
|
|
72 |
int bus = config->index;
|
|
|
73 |
clockgate_enable(CLOCKGATE_I2C(bus), true);
|
|
|
74 |
IICCON(bus) = 0xb7;
|
|
|
75 |
IICSTAT(bus) = 0x10;
|
|
|
76 |
bool tx = true;
|
|
|
77 |
int index;
|
|
|
78 |
for (index = 0; index < txn->transfercount; index++)
|
|
|
79 |
{
|
|
|
80 |
if (txn->transfers[index].type == I2C_TRANSFER_TYPE_TX) tx = true;
|
|
|
81 |
else if (txn->transfers[index].type == I2C_TRANSFER_TYPE_RX) tx = false;
|
|
|
82 |
uint8_t* buf = txn->transfers[index].rxbuf;
|
|
|
83 |
int len = txn->transfers[index].len;
|
|
|
84 |
if (!index && !tx) s5l87xx_i2c_send_start(bus, txn->address, true);
|
|
|
85 |
if (!tx && !len) continue;
|
|
|
86 |
if (txn->transfers[index].type != I2C_TRANSFER_TYPE_CONT)
|
|
|
87 |
s5l87xx_i2c_send_start(bus, txn->address, tx);
|
|
|
88 |
while (len--)
|
|
|
89 |
{
|
|
|
90 |
if (tx) s5l87xx_i2c_send_byte(bus, *buf++);
|
|
|
91 |
else *buf++ = s5l87xx_i2c_recv_byte(bus, len);
|
|
|
92 |
}
|
|
|
93 |
}
|
|
|
94 |
s5l87xx_i2c_send_stop(bus);
|
|
|
95 |
IICSTAT(bus) = 0;
|
|
|
96 |
clockgate_enable(CLOCKGATE_I2C(bus), false);
|
|
|
97 |
return I2C_RESULT_OK;
|
|
|
98 |
}
|
|
|
99 |
|
|
|
100 |
const struct i2c_driver s5l87xx_i2c_driver =
|
|
|
101 |
{
|
|
|
102 |
.init = s5l87xx_i2c_init,
|
|
|
103 |
.txn = s5l87xx_i2c_txn,
|
|
|
104 |
};
|