| 15 |
theseven |
1 |
//
|
|
|
2 |
//
|
|
|
3 |
// Copyright 2010 TheSeven
|
|
|
4 |
//
|
|
|
5 |
//
|
|
|
6 |
// This file is part of emBIOS.
|
|
|
7 |
//
|
|
|
8 |
// emBIOS is free software: you can redistribute it and/or
|
|
|
9 |
// modify it under the terms of the GNU General Public License as
|
|
|
10 |
// published by the Free Software Foundation, either version 2 of the
|
|
|
11 |
// License, or (at your option) any later version.
|
|
|
12 |
//
|
|
|
13 |
// emBIOS is distributed in the hope that it will be useful,
|
|
|
14 |
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
15 |
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|
|
16 |
// See the GNU General Public License for more details.
|
|
|
17 |
//
|
|
|
18 |
// You should have received a copy of the GNU General Public License along
|
|
|
19 |
// with emBIOS. If not, see <http://www.gnu.org/licenses/>.
|
|
|
20 |
//
|
|
|
21 |
//
|
|
|
22 |
|
|
|
23 |
|
|
|
24 |
#ifndef __SYNOPSYSOTG_H__
|
|
|
25 |
#define __SYNOPSYSOTG_H__
|
|
|
26 |
|
|
|
27 |
|
|
|
28 |
#include "global.h"
|
|
|
29 |
|
|
|
30 |
|
|
|
31 |
#ifdef TARGET_ipodnano2g
|
| 111 |
theseven |
32 |
#include "target/ipodnano2g/s5l8701.h"
|
| 15 |
theseven |
33 |
#endif
|
| 265 |
theseven |
34 |
#if defined(TARGET_ipodnano3g) || defined(TARGET_ipodclassic)
|
|
|
35 |
#include "target/ipodnano3g/s5l8702.h"
|
|
|
36 |
#endif
|
| 85 |
theseven |
37 |
#ifdef TARGET_ipodnano4g
|
| 111 |
theseven |
38 |
#include "target/ipodnano4g/s5l8720.h"
|
| 85 |
theseven |
39 |
#endif
|
| 15 |
theseven |
40 |
|
|
|
41 |
|
|
|
42 |
/*** OTG PHY CONTROL REGISTERS ***/
|
| 265 |
theseven |
43 |
#define OPHYPWR (*((uint32_t volatile*)(PHYBASE + 0x000)))
|
|
|
44 |
#define OPHYCLK (*((uint32_t volatile*)(PHYBASE + 0x004)))
|
|
|
45 |
#define ORSTCON (*((uint32_t volatile*)(PHYBASE + 0x008)))
|
|
|
46 |
#define OPHYUNK1 (*((uint32_t volatile*)(PHYBASE + 0x01c)))
|
|
|
47 |
#define OPHYUNK2 (*((uint32_t volatile*)(PHYBASE + 0x044)))
|
| 15 |
theseven |
48 |
|
|
|
49 |
/*** OTG LINK CORE REGISTERS ***/
|
|
|
50 |
/* Core Global Registers */
|
| 265 |
theseven |
51 |
#define GOTGCTL (*((uint32_t volatile*)(OTGBASE + 0x000)))
|
|
|
52 |
#define GOTGINT (*((uint32_t volatile*)(OTGBASE + 0x004)))
|
|
|
53 |
#define GAHBCFG (*((uint32_t volatile*)(OTGBASE + 0x008)))
|
|
|
54 |
#define GUSBCFG (*((uint32_t volatile*)(OTGBASE + 0x00C)))
|
|
|
55 |
#define GRSTCTL (*((uint32_t volatile*)(OTGBASE + 0x010)))
|
|
|
56 |
#define GINTSTS (*((uint32_t volatile*)(OTGBASE + 0x014)))
|
|
|
57 |
#define GINTMSK (*((uint32_t volatile*)(OTGBASE + 0x018)))
|
|
|
58 |
#define GRXSTSR (*((uint32_t volatile*)(OTGBASE + 0x01C)))
|
|
|
59 |
#define GRXSTSP (*((uint32_t volatile*)(OTGBASE + 0x020)))
|
|
|
60 |
#define GRXFSIZ (*((uint32_t volatile*)(OTGBASE + 0x024)))
|
|
|
61 |
#define GNPTXFSIZ (*((uint32_t volatile*)(OTGBASE + 0x028)))
|
|
|
62 |
#define GNPTXSTS (*((uint32_t volatile*)(OTGBASE + 0x02C)))
|
|
|
63 |
#define HPTXFSIZ (*((uint32_t volatile*)(OTGBASE + 0x100)))
|
|
|
64 |
#define DPTXFSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0x100 + 4 * (x))))
|
|
|
65 |
#define DPTXFSIZ1 (*((uint32_t volatile*)(OTGBASE + 0x104)))
|
|
|
66 |
#define DPTXFSIZ2 (*((uint32_t volatile*)(OTGBASE + 0x108)))
|
|
|
67 |
#define DPTXFSIZ3 (*((uint32_t volatile*)(OTGBASE + 0x10C)))
|
|
|
68 |
#define DPTXFSIZ4 (*((uint32_t volatile*)(OTGBASE + 0x110)))
|
|
|
69 |
#define DPTXFSIZ5 (*((uint32_t volatile*)(OTGBASE + 0x114)))
|
|
|
70 |
#define DPTXFSIZ6 (*((uint32_t volatile*)(OTGBASE + 0x118)))
|
|
|
71 |
#define DPTXFSIZ7 (*((uint32_t volatile*)(OTGBASE + 0x11C)))
|
|
|
72 |
#define DPTXFSIZ8 (*((uint32_t volatile*)(OTGBASE + 0x120)))
|
|
|
73 |
#define DPTXFSIZ9 (*((uint32_t volatile*)(OTGBASE + 0x124)))
|
|
|
74 |
#define DPTXFSIZ10 (*((uint32_t volatile*)(OTGBASE + 0x128)))
|
|
|
75 |
#define DPTXFSIZ11 (*((uint32_t volatile*)(OTGBASE + 0x12C)))
|
|
|
76 |
#define DPTXFSIZ12 (*((uint32_t volatile*)(OTGBASE + 0x130)))
|
|
|
77 |
#define DPTXFSIZ13 (*((uint32_t volatile*)(OTGBASE + 0x134)))
|
|
|
78 |
#define DPTXFSIZ14 (*((uint32_t volatile*)(OTGBASE + 0x138)))
|
|
|
79 |
#define DPTXFSIZ15 (*((uint32_t volatile*)(OTGBASE + 0x13C)))
|
| 15 |
theseven |
80 |
|
|
|
81 |
/*** HOST MODE REGISTERS ***/
|
|
|
82 |
/* Host Global Registers */
|
| 265 |
theseven |
83 |
#define HCFG (*((uint32_t volatile*)(OTGBASE + 0x400)))
|
|
|
84 |
#define HFIR (*((uint32_t volatile*)(OTGBASE + 0x404)))
|
|
|
85 |
#define HFNUM (*((uint32_t volatile*)(OTGBASE + 0x408)))
|
|
|
86 |
#define HPTXSTS (*((uint32_t volatile*)(OTGBASE + 0x410)))
|
|
|
87 |
#define HAINT (*((uint32_t volatile*)(OTGBASE + 0x414)))
|
|
|
88 |
#define HAINTMSK (*((uint32_t volatile*)(OTGBASE + 0x418)))
|
| 15 |
theseven |
89 |
|
|
|
90 |
/* Host Port Control and Status Registers */
|
| 265 |
theseven |
91 |
#define HPRT (*((uint32_t volatile*)(OTGBASE + 0x440)))
|
| 15 |
theseven |
92 |
|
|
|
93 |
/* Host Channel-Specific Registers */
|
| 265 |
theseven |
94 |
#define HCCHAR(x) (*((uint32_t volatile*)(OTGBASE + 0x500 + 0x20 * (x))))
|
|
|
95 |
#define HCSPLT(x) (*((uint32_t volatile*)(OTGBASE + 0x504 + 0x20 * (x))))
|
|
|
96 |
#define HCINT(x) (*((uint32_t volatile*)(OTGBASE + 0x508 + 0x20 * (x))))
|
|
|
97 |
#define HCINTMSK(x) (*((uint32_t volatile*)(OTGBASE + 0x50C + 0x20 * (x))))
|
|
|
98 |
#define HCTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0x510 + 0x20 * (x))))
|
|
|
99 |
#define HCDMA(x) (*((uint32_t volatile*)(OTGBASE + 0x514 + 0x20 * (x))))
|
|
|
100 |
#define HCCHAR0 (*((uint32_t volatile*)(OTGBASE + 0x500)))
|
|
|
101 |
#define HCSPLT0 (*((uint32_t volatile*)(OTGBASE + 0x504)))
|
|
|
102 |
#define HCINT0 (*((uint32_t volatile*)(OTGBASE + 0x508)))
|
|
|
103 |
#define HCINTMSK0 (*((uint32_t volatile*)(OTGBASE + 0x50C)))
|
|
|
104 |
#define HCTSIZ0 (*((uint32_t volatile*)(OTGBASE + 0x510)))
|
|
|
105 |
#define HCDMA0 (*((uint32_t volatile*)(OTGBASE + 0x514)))
|
|
|
106 |
#define HCCHAR1 (*((uint32_t volatile*)(OTGBASE + 0x520)))
|
|
|
107 |
#define HCSPLT1 (*((uint32_t volatile*)(OTGBASE + 0x524)))
|
|
|
108 |
#define HCINT1 (*((uint32_t volatile*)(OTGBASE + 0x528)))
|
|
|
109 |
#define HCINTMSK1 (*((uint32_t volatile*)(OTGBASE + 0x52C)))
|
|
|
110 |
#define HCTSIZ1 (*((uint32_t volatile*)(OTGBASE + 0x530)))
|
|
|
111 |
#define HCDMA1 (*((uint32_t volatile*)(OTGBASE + 0x534)))
|
|
|
112 |
#define HCCHAR2 (*((uint32_t volatile*)(OTGBASE + 0x540)))
|
|
|
113 |
#define HCSPLT2 (*((uint32_t volatile*)(OTGBASE + 0x544)))
|
|
|
114 |
#define HCINT2 (*((uint32_t volatile*)(OTGBASE + 0x548)))
|
|
|
115 |
#define HCINTMSK2 (*((uint32_t volatile*)(OTGBASE + 0x54C)))
|
|
|
116 |
#define HCTSIZ2 (*((uint32_t volatile*)(OTGBASE + 0x550)))
|
|
|
117 |
#define HCDMA2 (*((uint32_t volatile*)(OTGBASE + 0x554)))
|
|
|
118 |
#define HCCHAR3 (*((uint32_t volatile*)(OTGBASE + 0x560)))
|
|
|
119 |
#define HCSPLT3 (*((uint32_t volatile*)(OTGBASE + 0x564)))
|
|
|
120 |
#define HCINT3 (*((uint32_t volatile*)(OTGBASE + 0x568)))
|
|
|
121 |
#define HCINTMSK3 (*((uint32_t volatile*)(OTGBASE + 0x56C)))
|
|
|
122 |
#define HCTSIZ3 (*((uint32_t volatile*)(OTGBASE + 0x570)))
|
|
|
123 |
#define HCDMA3 (*((uint32_t volatile*)(OTGBASE + 0x574)))
|
|
|
124 |
#define HCCHAR4 (*((uint32_t volatile*)(OTGBASE + 0x580)))
|
|
|
125 |
#define HCSPLT4 (*((uint32_t volatile*)(OTGBASE + 0x584)))
|
|
|
126 |
#define HCINT4 (*((uint32_t volatile*)(OTGBASE + 0x588)))
|
|
|
127 |
#define HCINTMSK4 (*((uint32_t volatile*)(OTGBASE + 0x58C)))
|
|
|
128 |
#define HCTSIZ4 (*((uint32_t volatile*)(OTGBASE + 0x590)))
|
|
|
129 |
#define HCDMA4 (*((uint32_t volatile*)(OTGBASE + 0x594)))
|
|
|
130 |
#define HCCHAR5 (*((uint32_t volatile*)(OTGBASE + 0x5A0)))
|
|
|
131 |
#define HCSPLT5 (*((uint32_t volatile*)(OTGBASE + 0x5A4)))
|
|
|
132 |
#define HCINT5 (*((uint32_t volatile*)(OTGBASE + 0x5A8)))
|
|
|
133 |
#define HCINTMSK5 (*((uint32_t volatile*)(OTGBASE + 0x5AC)))
|
|
|
134 |
#define HCTSIZ5 (*((uint32_t volatile*)(OTGBASE + 0x5B0)))
|
|
|
135 |
#define HCDMA5 (*((uint32_t volatile*)(OTGBASE + 0x5B4)))
|
|
|
136 |
#define HCCHAR6 (*((uint32_t volatile*)(OTGBASE + 0x5C0)))
|
|
|
137 |
#define HCSPLT6 (*((uint32_t volatile*)(OTGBASE + 0x5C4)))
|
|
|
138 |
#define HCINT6 (*((uint32_t volatile*)(OTGBASE + 0x5C8)))
|
|
|
139 |
#define HCINTMSK6 (*((uint32_t volatile*)(OTGBASE + 0x5CC)))
|
|
|
140 |
#define HCTSIZ6 (*((uint32_t volatile*)(OTGBASE + 0x5D0)))
|
|
|
141 |
#define HCDMA6 (*((uint32_t volatile*)(OTGBASE + 0x5D4)))
|
|
|
142 |
#define HCCHAR7 (*((uint32_t volatile*)(OTGBASE + 0x5E0)))
|
|
|
143 |
#define HCSPLT7 (*((uint32_t volatile*)(OTGBASE + 0x5E4)))
|
|
|
144 |
#define HCINT7 (*((uint32_t volatile*)(OTGBASE + 0x5E8)))
|
|
|
145 |
#define HCINTMSK7 (*((uint32_t volatile*)(OTGBASE + 0x5EC)))
|
|
|
146 |
#define HCTSIZ7 (*((uint32_t volatile*)(OTGBASE + 0x5F0)))
|
|
|
147 |
#define HCDMA7 (*((uint32_t volatile*)(OTGBASE + 0x5F4)))
|
|
|
148 |
#define HCCHAR8 (*((uint32_t volatile*)(OTGBASE + 0x600)))
|
|
|
149 |
#define HCSPLT8 (*((uint32_t volatile*)(OTGBASE + 0x604)))
|
|
|
150 |
#define HCINT8 (*((uint32_t volatile*)(OTGBASE + 0x608)))
|
|
|
151 |
#define HCINTMSK8 (*((uint32_t volatile*)(OTGBASE + 0x60C)))
|
|
|
152 |
#define HCTSIZ8 (*((uint32_t volatile*)(OTGBASE + 0x610)))
|
|
|
153 |
#define HCDMA8 (*((uint32_t volatile*)(OTGBASE + 0x614)))
|
|
|
154 |
#define HCCHAR9 (*((uint32_t volatile*)(OTGBASE + 0x620)))
|
|
|
155 |
#define HCSPLT9 (*((uint32_t volatile*)(OTGBASE + 0x624)))
|
|
|
156 |
#define HCINT9 (*((uint32_t volatile*)(OTGBASE + 0x628)))
|
|
|
157 |
#define HCINTMSK9 (*((uint32_t volatile*)(OTGBASE + 0x62C)))
|
|
|
158 |
#define HCTSIZ9 (*((uint32_t volatile*)(OTGBASE + 0x630)))
|
|
|
159 |
#define HCDMA9 (*((uint32_t volatile*)(OTGBASE + 0x634)))
|
|
|
160 |
#define HCCHAR10 (*((uint32_t volatile*)(OTGBASE + 0x640)))
|
|
|
161 |
#define HCSPLT10 (*((uint32_t volatile*)(OTGBASE + 0x644)))
|
|
|
162 |
#define HCINT10 (*((uint32_t volatile*)(OTGBASE + 0x648)))
|
|
|
163 |
#define HCINTMSK10 (*((uint32_t volatile*)(OTGBASE + 0x64C)))
|
|
|
164 |
#define HCTSIZ10 (*((uint32_t volatile*)(OTGBASE + 0x650)))
|
|
|
165 |
#define HCDMA10 (*((uint32_t volatile*)(OTGBASE + 0x654)))
|
|
|
166 |
#define HCCHAR11 (*((uint32_t volatile*)(OTGBASE + 0x660)))
|
|
|
167 |
#define HCSPLT11 (*((uint32_t volatile*)(OTGBASE + 0x664)))
|
|
|
168 |
#define HCINT11 (*((uint32_t volatile*)(OTGBASE + 0x668)))
|
|
|
169 |
#define HCINTMSK11 (*((uint32_t volatile*)(OTGBASE + 0x66C)))
|
|
|
170 |
#define HCTSIZ11 (*((uint32_t volatile*)(OTGBASE + 0x670)))
|
|
|
171 |
#define HCDMA11 (*((uint32_t volatile*)(OTGBASE + 0x674)))
|
|
|
172 |
#define HCCHAR12 (*((uint32_t volatile*)(OTGBASE + 0x680)))
|
|
|
173 |
#define HCSPLT12 (*((uint32_t volatile*)(OTGBASE + 0x684)))
|
|
|
174 |
#define HCINT12 (*((uint32_t volatile*)(OTGBASE + 0x688)))
|
|
|
175 |
#define HCINTMSK12 (*((uint32_t volatile*)(OTGBASE + 0x68C)))
|
|
|
176 |
#define HCTSIZ12 (*((uint32_t volatile*)(OTGBASE + 0x690)))
|
|
|
177 |
#define HCDMA12 (*((uint32_t volatile*)(OTGBASE + 0x694)))
|
|
|
178 |
#define HCCHAR13 (*((uint32_t volatile*)(OTGBASE + 0x6A0)))
|
|
|
179 |
#define HCSPLT13 (*((uint32_t volatile*)(OTGBASE + 0x6A4)))
|
|
|
180 |
#define HCINT13 (*((uint32_t volatile*)(OTGBASE + 0x6A8)))
|
|
|
181 |
#define HCINTMSK13 (*((uint32_t volatile*)(OTGBASE + 0x6AC)))
|
|
|
182 |
#define HCTSIZ13 (*((uint32_t volatile*)(OTGBASE + 0x6B0)))
|
|
|
183 |
#define HCDMA13 (*((uint32_t volatile*)(OTGBASE + 0x6B4)))
|
|
|
184 |
#define HCCHAR14 (*((uint32_t volatile*)(OTGBASE + 0x6C0)))
|
|
|
185 |
#define HCSPLT14 (*((uint32_t volatile*)(OTGBASE + 0x6C4)))
|
|
|
186 |
#define HCINT14 (*((uint32_t volatile*)(OTGBASE + 0x6C8)))
|
|
|
187 |
#define HCINTMSK14 (*((uint32_t volatile*)(OTGBASE + 0x6CC)))
|
|
|
188 |
#define HCTSIZ14 (*((uint32_t volatile*)(OTGBASE + 0x6D0)))
|
|
|
189 |
#define HCDMA14 (*((uint32_t volatile*)(OTGBASE + 0x6D4)))
|
|
|
190 |
#define HCCHAR15 (*((uint32_t volatile*)(OTGBASE + 0x6E0)))
|
|
|
191 |
#define HCSPLT15 (*((uint32_t volatile*)(OTGBASE + 0x6E4)))
|
|
|
192 |
#define HCINT15 (*((uint32_t volatile*)(OTGBASE + 0x6E8)))
|
|
|
193 |
#define HCINTMSK15 (*((uint32_t volatile*)(OTGBASE + 0x6EC)))
|
|
|
194 |
#define HCTSIZ15 (*((uint32_t volatile*)(OTGBASE + 0x6F0)))
|
|
|
195 |
#define HCDMA15 (*((uint32_t volatile*)(OTGBASE + 0x6F4)))
|
| 15 |
theseven |
196 |
|
|
|
197 |
/*** DEVICE MODE REGISTERS ***/
|
|
|
198 |
/* Device Global Registers */
|
| 265 |
theseven |
199 |
#define DCFG (*((uint32_t volatile*)(OTGBASE + 0x800)))
|
|
|
200 |
#define DCTL (*((uint32_t volatile*)(OTGBASE + 0x804)))
|
|
|
201 |
#define DSTS (*((uint32_t volatile*)(OTGBASE + 0x808)))
|
|
|
202 |
#define DIEPMSK (*((uint32_t volatile*)(OTGBASE + 0x810)))
|
|
|
203 |
#define DOEPMSK (*((uint32_t volatile*)(OTGBASE + 0x814)))
|
|
|
204 |
#define DAINT (*((uint32_t volatile*)(OTGBASE + 0x818)))
|
|
|
205 |
#define DAINTMSK (*((uint32_t volatile*)(OTGBASE + 0x81C)))
|
|
|
206 |
#define DTKNQR1 (*((uint32_t volatile*)(OTGBASE + 0x820)))
|
|
|
207 |
#define DTKNQR2 (*((uint32_t volatile*)(OTGBASE + 0x824)))
|
|
|
208 |
#define DVBUSDIS (*((uint32_t volatile*)(OTGBASE + 0x828)))
|
|
|
209 |
#define DVBUSPULSE (*((uint32_t volatile*)(OTGBASE + 0x82C)))
|
|
|
210 |
#define DTKNQR3 (*((uint32_t volatile*)(OTGBASE + 0x830)))
|
|
|
211 |
#define DTKNQR4 (*((uint32_t volatile*)(OTGBASE + 0x834)))
|
| 15 |
theseven |
212 |
|
|
|
213 |
/* Device Logical IN Endpoint-Specific Registers */
|
| 265 |
theseven |
214 |
#define DIEPCTL(x) (*((uint32_t volatile*)(OTGBASE + 0x900 + 0x20 * (x))))
|
|
|
215 |
#define DIEPINT(x) (*((uint32_t volatile*)(OTGBASE + 0x908 + 0x20 * (x))))
|
|
|
216 |
#define DIEPTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0x910 + 0x20 * (x))))
|
|
|
217 |
#define DIEPDMA(x) (*((const void* volatile*)(OTGBASE + 0x914 + 0x20 * (x))))
|
|
|
218 |
#define DIEPCTL0 (*((uint32_t volatile*)(OTGBASE + 0x900)))
|
|
|
219 |
#define DIEPINT0 (*((uint32_t volatile*)(OTGBASE + 0x908)))
|
|
|
220 |
#define DIEPTSIZ0 (*((uint32_t volatile*)(OTGBASE + 0x910)))
|
|
|
221 |
#define DIEPDMA0 (*((const void* volatile*)(OTGBASE + 0x914)))
|
|
|
222 |
#define DIEPCTL1 (*((uint32_t volatile*)(OTGBASE + 0x920)))
|
|
|
223 |
#define DIEPINT1 (*((uint32_t volatile*)(OTGBASE + 0x928)))
|
|
|
224 |
#define DIEPTSIZ1 (*((uint32_t volatile*)(OTGBASE + 0x930)))
|
|
|
225 |
#define DIEPDMA1 (*((const void* volatile*)(OTGBASE + 0x934)))
|
|
|
226 |
#define DIEPCTL2 (*((uint32_t volatile*)(OTGBASE + 0x940)))
|
|
|
227 |
#define DIEPINT2 (*((uint32_t volatile*)(OTGBASE + 0x948)))
|
|
|
228 |
#define DIEPTSIZ2 (*((uint32_t volatile*)(OTGBASE + 0x950)))
|
|
|
229 |
#define DIEPDMA2 (*((const void* volatile*)(OTGBASE + 0x954)))
|
|
|
230 |
#define DIEPCTL3 (*((uint32_t volatile*)(OTGBASE + 0x960)))
|
|
|
231 |
#define DIEPINT3 (*((uint32_t volatile*)(OTGBASE + 0x968)))
|
|
|
232 |
#define DIEPTSIZ3 (*((uint32_t volatile*)(OTGBASE + 0x970)))
|
|
|
233 |
#define DIEPDMA3 (*((const void* volatile*)(OTGBASE + 0x974)))
|
|
|
234 |
#define DIEPCTL4 (*((uint32_t volatile*)(OTGBASE + 0x980)))
|
|
|
235 |
#define DIEPINT4 (*((uint32_t volatile*)(OTGBASE + 0x988)))
|
|
|
236 |
#define DIEPTSIZ4 (*((uint32_t volatile*)(OTGBASE + 0x990)))
|
|
|
237 |
#define DIEPDMA4 (*((const void* volatile*)(OTGBASE + 0x994)))
|
|
|
238 |
#define DIEPCTL5 (*((uint32_t volatile*)(OTGBASE + 0x9A0)))
|
|
|
239 |
#define DIEPINT5 (*((uint32_t volatile*)(OTGBASE + 0x9A8)))
|
|
|
240 |
#define DIEPTSIZ5 (*((uint32_t volatile*)(OTGBASE + 0x9B0)))
|
|
|
241 |
#define DIEPDMA5 (*((const void* volatile*)(OTGBASE + 0x9B4)))
|
|
|
242 |
#define DIEPCTL6 (*((uint32_t volatile*)(OTGBASE + 0x9C0)))
|
|
|
243 |
#define DIEPINT6 (*((uint32_t volatile*)(OTGBASE + 0x9C8)))
|
|
|
244 |
#define DIEPTSIZ6 (*((uint32_t volatile*)(OTGBASE + 0x9D0)))
|
|
|
245 |
#define DIEPDMA6 (*((const void* volatile*)(OTGBASE + 0x9D4)))
|
|
|
246 |
#define DIEPCTL7 (*((uint32_t volatile*)(OTGBASE + 0x9E0)))
|
|
|
247 |
#define DIEPINT7 (*((uint32_t volatile*)(OTGBASE + 0x9E8)))
|
|
|
248 |
#define DIEPTSIZ7 (*((uint32_t volatile*)(OTGBASE + 0x9F0)))
|
|
|
249 |
#define DIEPDMA7 (*((const void* volatile*)(OTGBASE + 0x9F4)))
|
|
|
250 |
#define DIEPCTL8 (*((uint32_t volatile*)(OTGBASE + 0xA00)))
|
|
|
251 |
#define DIEPINT8 (*((uint32_t volatile*)(OTGBASE + 0xA08)))
|
|
|
252 |
#define DIEPTSIZ8 (*((uint32_t volatile*)(OTGBASE + 0xA10)))
|
|
|
253 |
#define DIEPDMA8 (*((const void* volatile*)(OTGBASE + 0xA14)))
|
|
|
254 |
#define DIEPCTL9 (*((uint32_t volatile*)(OTGBASE + 0xA20)))
|
|
|
255 |
#define DIEPINT9 (*((uint32_t volatile*)(OTGBASE + 0xA28)))
|
|
|
256 |
#define DIEPTSIZ9 (*((uint32_t volatile*)(OTGBASE + 0xA30)))
|
|
|
257 |
#define DIEPDMA9 (*((const void* volatile*)(OTGBASE + 0xA34)))
|
|
|
258 |
#define DIEPCTL10 (*((uint32_t volatile*)(OTGBASE + 0xA40)))
|
|
|
259 |
#define DIEPINT10 (*((uint32_t volatile*)(OTGBASE + 0xA48)))
|
|
|
260 |
#define DIEPTSIZ10 (*((uint32_t volatile*)(OTGBASE + 0xA50)))
|
|
|
261 |
#define DIEPDMA10 (*((const void* volatile*)(OTGBASE + 0xA54)))
|
|
|
262 |
#define DIEPCTL11 (*((uint32_t volatile*)(OTGBASE + 0xA60)))
|
|
|
263 |
#define DIEPINT11 (*((uint32_t volatile*)(OTGBASE + 0xA68)))
|
|
|
264 |
#define DIEPTSIZ11 (*((uint32_t volatile*)(OTGBASE + 0xA70)))
|
|
|
265 |
#define DIEPDMA11 (*((const void* volatile*)(OTGBASE + 0xA74)))
|
|
|
266 |
#define DIEPCTL12 (*((uint32_t volatile*)(OTGBASE + 0xA80)))
|
|
|
267 |
#define DIEPINT12 (*((uint32_t volatile*)(OTGBASE + 0xA88)))
|
|
|
268 |
#define DIEPTSIZ12 (*((uint32_t volatile*)(OTGBASE + 0xA90)))
|
|
|
269 |
#define DIEPDMA12 (*((const void* volatile*)(OTGBASE + 0xA94)))
|
|
|
270 |
#define DIEPCTL13 (*((uint32_t volatile*)(OTGBASE + 0xAA0)))
|
|
|
271 |
#define DIEPINT13 (*((uint32_t volatile*)(OTGBASE + 0xAA8)))
|
|
|
272 |
#define DIEPTSIZ13 (*((uint32_t volatile*)(OTGBASE + 0xAB0)))
|
|
|
273 |
#define DIEPDMA13 (*((const void* volatile*)(OTGBASE + 0xAB4)))
|
|
|
274 |
#define DIEPCTL14 (*((uint32_t volatile*)(OTGBASE + 0xAC0)))
|
|
|
275 |
#define DIEPINT14 (*((uint32_t volatile*)(OTGBASE + 0xAC8)))
|
|
|
276 |
#define DIEPTSIZ14 (*((uint32_t volatile*)(OTGBASE + 0xAD0)))
|
|
|
277 |
#define DIEPDMA14 (*((const void* volatile*)(OTGBASE + 0xAD4)))
|
|
|
278 |
#define DIEPCTL15 (*((uint32_t volatile*)(OTGBASE + 0xAE0)))
|
|
|
279 |
#define DIEPINT15 (*((uint32_t volatile*)(OTGBASE + 0xAE8)))
|
|
|
280 |
#define DIEPTSIZ15 (*((uint32_t volatile*)(OTGBASE + 0xAF0)))
|
|
|
281 |
#define DIEPDMA15 (*((const void* volatile*)(OTGBASE + 0xAF4)))
|
| 15 |
theseven |
282 |
|
|
|
283 |
/* Device Logical OUT Endpoint-Specific Registers */
|
| 265 |
theseven |
284 |
#define DOEPCTL(x) (*((uint32_t volatile*)(OTGBASE + 0xB00 + 0x20 * (x))))
|
|
|
285 |
#define DOEPINT(x) (*((uint32_t volatile*)(OTGBASE + 0xB08 + 0x20 * (x))))
|
|
|
286 |
#define DOEPTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0xB10 + 0x20 * (x))))
|
|
|
287 |
#define DOEPDMA(x) (*((void* volatile*)(OTGBASE + 0xB14 + 0x20 * (x))))
|
|
|
288 |
#define DOEPCTL0 (*((uint32_t volatile*)(OTGBASE + 0xB00)))
|
|
|
289 |
#define DOEPINT0 (*((uint32_t volatile*)(OTGBASE + 0xB08)))
|
|
|
290 |
#define DOEPTSIZ0 (*((uint32_t volatile*)(OTGBASE + 0xB10)))
|
|
|
291 |
#define DOEPDMA0 (*((void* volatile*)(OTGBASE + 0xB14)))
|
|
|
292 |
#define DOEPCTL1 (*((uint32_t volatile*)(OTGBASE + 0xB20)))
|
|
|
293 |
#define DOEPINT1 (*((uint32_t volatile*)(OTGBASE + 0xB28)))
|
|
|
294 |
#define DOEPTSIZ1 (*((uint32_t volatile*)(OTGBASE + 0xB30)))
|
|
|
295 |
#define DOEPDMA1 (*((void* volatile*)(OTGBASE + 0xB34)))
|
|
|
296 |
#define DOEPCTL2 (*((uint32_t volatile*)(OTGBASE + 0xB40)))
|
|
|
297 |
#define DOEPINT2 (*((uint32_t volatile*)(OTGBASE + 0xB48)))
|
|
|
298 |
#define DOEPTSIZ2 (*((uint32_t volatile*)(OTGBASE + 0xB50)))
|
|
|
299 |
#define DOEPDMA2 (*((void* volatile*)(OTGBASE + 0xB54)))
|
|
|
300 |
#define DOEPCTL3 (*((uint32_t volatile*)(OTGBASE + 0xB60)))
|
|
|
301 |
#define DOEPINT3 (*((uint32_t volatile*)(OTGBASE + 0xB68)))
|
|
|
302 |
#define DOEPTSIZ3 (*((uint32_t volatile*)(OTGBASE + 0xB70)))
|
|
|
303 |
#define DOEPDMA3 (*((void* volatile*)(OTGBASE + 0xB74)))
|
|
|
304 |
#define DOEPCTL4 (*((uint32_t volatile*)(OTGBASE + 0xB80)))
|
|
|
305 |
#define DOEPINT4 (*((uint32_t volatile*)(OTGBASE + 0xB88)))
|
|
|
306 |
#define DOEPTSIZ4 (*((uint32_t volatile*)(OTGBASE + 0xB90)))
|
|
|
307 |
#define DOEPDMA4 (*((void* volatile*)(OTGBASE + 0xB94)))
|
|
|
308 |
#define DOEPCTL5 (*((uint32_t volatile*)(OTGBASE + 0xBA0)))
|
|
|
309 |
#define DOEPINT5 (*((uint32_t volatile*)(OTGBASE + 0xBA8)))
|
|
|
310 |
#define DOEPTSIZ5 (*((uint32_t volatile*)(OTGBASE + 0xBB0)))
|
|
|
311 |
#define DOEPDMA5 (*((void* volatile*)(OTGBASE + 0xBB4)))
|
|
|
312 |
#define DOEPCTL6 (*((uint32_t volatile*)(OTGBASE + 0xBC0)))
|
|
|
313 |
#define DOEPINT6 (*((uint32_t volatile*)(OTGBASE + 0xBC8)))
|
|
|
314 |
#define DOEPTSIZ6 (*((uint32_t volatile*)(OTGBASE + 0xBD0)))
|
|
|
315 |
#define DOEPDMA6 (*((void* volatile*)(OTGBASE + 0xBD4)))
|
|
|
316 |
#define DOEPCTL7 (*((uint32_t volatile*)(OTGBASE + 0xBE0)))
|
|
|
317 |
#define DOEPINT7 (*((uint32_t volatile*)(OTGBASE + 0xBE8)))
|
|
|
318 |
#define DOEPTSIZ7 (*((uint32_t volatile*)(OTGBASE + 0xBF0)))
|
|
|
319 |
#define DOEPDMA7 (*((void* volatile*)(OTGBASE + 0xBF4)))
|
|
|
320 |
#define DOEPCTL8 (*((uint32_t volatile*)(OTGBASE + 0xC00)))
|
|
|
321 |
#define DOEPINT8 (*((uint32_t volatile*)(OTGBASE + 0xC08)))
|
|
|
322 |
#define DOEPTSIZ8 (*((uint32_t volatile*)(OTGBASE + 0xC10)))
|
|
|
323 |
#define DOEPDMA8 (*((void* volatile*)(OTGBASE + 0xC14)))
|
|
|
324 |
#define DOEPCTL9 (*((uint32_t volatile*)(OTGBASE + 0xC20)))
|
|
|
325 |
#define DOEPINT9 (*((uint32_t volatile*)(OTGBASE + 0xC28)))
|
|
|
326 |
#define DOEPTSIZ9 (*((uint32_t volatile*)(OTGBASE + 0xC30)))
|
|
|
327 |
#define DOEPDMA9 (*((void* volatile*)(OTGBASE + 0xC34)))
|
|
|
328 |
#define DOEPCTL10 (*((uint32_t volatile*)(OTGBASE + 0xC40)))
|
|
|
329 |
#define DOEPINT10 (*((uint32_t volatile*)(OTGBASE + 0xC48)))
|
|
|
330 |
#define DOEPTSIZ10 (*((uint32_t volatile*)(OTGBASE + 0xC50)))
|
|
|
331 |
#define DOEPDMA10 (*((void* volatile*)(OTGBASE + 0xC54)))
|
|
|
332 |
#define DOEPCTL11 (*((uint32_t volatile*)(OTGBASE + 0xC60)))
|
|
|
333 |
#define DOEPINT11 (*((uint32_t volatile*)(OTGBASE + 0xC68)))
|
|
|
334 |
#define DOEPTSIZ11 (*((uint32_t volatile*)(OTGBASE + 0xC70)))
|
|
|
335 |
#define DOEPDMA11 (*((void* volatile*)(OTGBASE + 0xC74)))
|
|
|
336 |
#define DOEPCTL12 (*((uint32_t volatile*)(OTGBASE + 0xC80)))
|
|
|
337 |
#define DOEPINT12 (*((uint32_t volatile*)(OTGBASE + 0xC88)))
|
|
|
338 |
#define DOEPTSIZ12 (*((uint32_t volatile*)(OTGBASE + 0xC90)))
|
|
|
339 |
#define DOEPDMA12 (*((void* volatile*)(OTGBASE + 0xC94)))
|
|
|
340 |
#define DOEPCTL13 (*((uint32_t volatile*)(OTGBASE + 0xCA0)))
|
|
|
341 |
#define DOEPINT13 (*((uint32_t volatile*)(OTGBASE + 0xCA8)))
|
|
|
342 |
#define DOEPTSIZ13 (*((uint32_t volatile*)(OTGBASE + 0xCB0)))
|
|
|
343 |
#define DOEPDMA13 (*((void* volatile*)(OTGBASE + 0xCB4)))
|
|
|
344 |
#define DOEPCTL14 (*((uint32_t volatile*)(OTGBASE + 0xCC0)))
|
|
|
345 |
#define DOEPINT14 (*((uint32_t volatile*)(OTGBASE + 0xCC8)))
|
|
|
346 |
#define DOEPTSIZ14 (*((uint32_t volatile*)(OTGBASE + 0xCD0)))
|
|
|
347 |
#define DOEPDMA14 (*((void* volatile*)(OTGBASE + 0xCD4)))
|
|
|
348 |
#define DOEPCTL15 (*((uint32_t volatile*)(OTGBASE + 0xCE0)))
|
|
|
349 |
#define DOEPINT15 (*((uint32_t volatile*)(OTGBASE + 0xCE8)))
|
|
|
350 |
#define DOEPTSIZ15 (*((uint32_t volatile*)(OTGBASE + 0xCF0)))
|
|
|
351 |
#define DOEPDMA15 (*((void* volatile*)(OTGBASE + 0xCF4)))
|
| 15 |
theseven |
352 |
|
|
|
353 |
/* Power and Clock Gating Register */
|
| 265 |
theseven |
354 |
#define PCGCCTL (*((uint32_t volatile*)(OTGBASE + 0xE00)))
|
| 15 |
theseven |
355 |
|
|
|
356 |
|
|
|
357 |
#endif
|