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//
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// Copyright 2010 TheSeven
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//
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//
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// This file is part of emCORE.
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//
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// emCORE is free software: you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as
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// published by the Free Software Foundation, either version 2 of the
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// License, or (at your option) any later version.
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//
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// emCORE is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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// See the GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with emCORE. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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#ifndef __S5L8701_H__
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#define __S5L8701_H__
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#include "global.h"
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/////CLKCON/////
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#define CLKCON (*((uint32_t volatile*)(0x3C500000)))
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#define PLL0PMS (*((uint32_t volatile*)(0x3C500004)))
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#define PLL1PMS (*((uint32_t volatile*)(0x3C500008)))
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#define PLL2PMS (*((uint32_t volatile*)(0x3C50000C)))
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#define PLL0LCNT (*((uint32_t volatile*)(0x3C500014)))
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#define PLL1LCNT (*((uint32_t volatile*)(0x3C500018)))
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#define PLL2LCNT (*((uint32_t volatile*)(0x3C50001C)))
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#define PLLLOCK (*((uint32_t volatile*)(0x3C500020)))
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#define PLLCON (*((uint32_t volatile*)(0x3C500024)))
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#define PWRMODE (*((uint32_t volatile*)(0x3C50002C)))
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#define SWRCON (*((uint32_t volatile*)(0x3C500030)))
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#define RSTSR (*((uint32_t volatile*)(0x3C500034)))
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#define DSPCLKMD (*((uint32_t volatile*)(0x3C500038)))
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#define CLKCON2 (*((uint32_t volatile*)(0x3C50003C)))
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#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 + ((i) == 1 ? 0x40 : 0x28))))
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/////ICU/////
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#define SRCPND (*((uint32_t volatile*)(0x39C00000)))
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#define INTMOD (*((uint32_t volatile*)(0x39C00004)))
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#define INTMSK (*((uint32_t volatile*)(0x39C00008)))
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#define INTPRIO (*((uint32_t volatile*)(0x39C0000C)))
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#define INTPND (*((uint32_t volatile*)(0x39C00010)))
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#define INTOFFSET (*((uint32_t volatile*)(0x39C00014)))
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#define EINTPOL (*((uint32_t volatile*)(0x39C00018)))
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#define EINTPEND (*((uint32_t volatile*)(0x39C0001C)))
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#define EINTMSK (*((uint32_t volatile*)(0x39C00020)))
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/////GPIO/////
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#define PCON0 (*((uint32_t volatile*)(0x3CF00000)))
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#define PDAT0 (*((uint32_t volatile*)(0x3CF00004)))
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#define PCON1 (*((uint32_t volatile*)(0x3CF00010)))
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#define PDAT1 (*((uint32_t volatile*)(0x3CF00014)))
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#define PCON2 (*((uint32_t volatile*)(0x3CF00020)))
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#define PDAT2 (*((uint32_t volatile*)(0x3CF00024)))
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#define PCON3 (*((uint32_t volatile*)(0x3CF00030)))
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#define PDAT3 (*((uint32_t volatile*)(0x3CF00034)))
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#define PCON4 (*((uint32_t volatile*)(0x3CF00040)))
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#define PDAT4 (*((uint32_t volatile*)(0x3CF00044)))
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#define PCON5 (*((uint32_t volatile*)(0x3CF00050)))
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#define PDAT5 (*((uint32_t volatile*)(0x3CF00054)))
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#define PUNK5 (*((uint32_t volatile*)(0x3CF0005C)))
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#define PCON6 (*((uint32_t volatile*)(0x3CF00060)))
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#define PDAT6 (*((uint32_t volatile*)(0x3CF00064)))
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#define PCON7 (*((uint32_t volatile*)(0x3CF00070)))
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#define PDAT7 (*((uint32_t volatile*)(0x3CF00074)))
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#define PCON10 (*((uint32_t volatile*)(0x3CF000A0)))
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#define PDAT10 (*((uint32_t volatile*)(0x3CF000A4)))
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#define PCON11 (*((uint32_t volatile*)(0x3CF000B0)))
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#define PDAT11 (*((uint32_t volatile*)(0x3CF000B4)))
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#define PCON13 (*((uint32_t volatile*)(0x3CF000D0)))
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#define PDAT13 (*((uint32_t volatile*)(0x3CF000D4)))
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#define PCON14 (*((uint32_t volatile*)(0x3CF000E0)))
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#define PDAT14 (*((uint32_t volatile*)(0x3CF000E4)))
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#define PCON15 (*((uint32_t volatile*)(0x3CF000F0)))
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#define PUNK15 (*((uint32_t volatile*)(0x3CF000FC)))
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/////IODMA/////
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#define DMABASE0 (*((void* volatile*)(0x38400000)))
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#define DMACON0 (*((uint32_t volatile*)(0x38400004)))
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#define DMATCNT0 (*((uint32_t volatile*)(0x38400008)))
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#define DMACADDR0 (*((void* volatile*)(0x3840000C)))
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#define DMACTCNT0 (*((uint32_t volatile*)(0x38400010)))
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#define DMACOM0 (*((uint32_t volatile*)(0x38400014)))
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#define DMANOF0 (*((uint32_t volatile*)(0x38400018)))
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#define DMABASE1 (*((void* volatile*)(0x38400020)))
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#define DMACON1 (*((uint32_t volatile*)(0x38400024)))
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#define DMATCNT1 (*((uint32_t volatile*)(0x38400028)))
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#define DMACADDR1 (*((void* volatile*)(0x3840002C)))
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#define DMACTCNT1 (*((uint32_t volatile*)(0x38400030)))
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#define DMACOM1 (*((uint32_t volatile*)(0x38400034)))
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#define DMABASE2 (*((void* volatile*)(0x38400040)))
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#define DMACON2 (*((uint32_t volatile*)(0x38400044)))
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#define DMATCNT2 (*((uint32_t volatile*)(0x38400048)))
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#define DMACADDR2 (*((void* volatile*)(0x3840004C)))
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#define DMACTCNT2 (*((uint32_t volatile*)(0x38400050)))
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#define DMACOM2 (*((uint32_t volatile*)(0x38400054)))
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#define DMABASE3 (*((void* volatile*)(0x38400060)))
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#define DMACON3 (*((uint32_t volatile*)(0x38400064)))
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#define DMATCNT3 (*((uint32_t volatile*)(0x38400068)))
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#define DMACADDR3 (*((void* volatile*)(0x3840006C)))
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#define DMACTCNT3 (*((uint32_t volatile*)(0x38400070)))
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#define DMACOM3 (*((uint32_t volatile*)(0x38400074)))
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#define DMABASE4 (*((void* volatile*)(0x38400080)))
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#define DMACON4 (*((uint32_t volatile*)(0x38400084)))
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#define DMATCNT4 (*((uint32_t volatile*)(0x38400088)))
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#define DMACADDR4 (*((void* volatile*)(0x3840008C)))
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#define DMACTCNT4 (*((uint32_t volatile*)(0x38400090)))
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#define DMACOM4 (*((uint32_t volatile*)(0x38400094)))
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#define DMABASE5 (*((void* volatile*)(0x384000A0)))
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#define DMACON5 (*((uint32_t volatile*)(0x384000A4)))
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#define DMATCNT5 (*((uint32_t volatile*)(0x384000A8)))
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#define DMACADDR5 (*((void* volatile*)(0x384000AC)))
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#define DMACTCNT5 (*((uint32_t volatile*)(0x384000B0)))
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#define DMACOM5 (*((uint32_t volatile*)(0x384000B4)))
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#define DMABASE6 (*((void* volatile*)(0x384000C0)))
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#define DMACON6 (*((uint32_t volatile*)(0x384000C4)))
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#define DMATCNT6 (*((uint32_t volatile*)(0x384000C8)))
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#define DMACADDR6 (*((void* volatile*)(0x384000CC)))
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#define DMACTCNT6 (*((uint32_t volatile*)(0x384000D0)))
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#define DMACOM6 (*((uint32_t volatile*)(0x384000D4)))
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#define DMABASE7 (*((void* volatile*)(0x384000E0)))
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#define DMACON7 (*((uint32_t volatile*)(0x384000E4)))
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#define DMATCNT7 (*((uint32_t volatile*)(0x384000E8)))
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#define DMACADDR7 (*((void* volatile*)(0x384000EC)))
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#define DMACTCNT7 (*((uint32_t volatile*)(0x384000F0)))
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#define DMACOM7 (*((uint32_t volatile*)(0x384000F4)))
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#define DMABASE8 (*((void* volatile*)(0x38400100)))
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#define DMACON8 (*((uint32_t volatile*)(0x38400104)))
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#define DMATCNT8 (*((uint32_t volatile*)(0x38400108)))
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#define DMACADDR8 (*((void* volatile*)(0x3840010C)))
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#define DMACTCNT8 (*((uint32_t volatile*)(0x38400110)))
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#define DMACOM8 (*((uint32_t volatile*)(0x38400114)))
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#define DMAALLST (*((uint32_t volatile*)(0x38400180)))
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#define DMAALLST2 (*((uint32_t volatile*)(0x38400184)))
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#define DMACON_DEVICE_SHIFT 30
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#define DMACON_DIRECTION_SHIFT 29
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#define DMACON_DATA_SIZE_SHIFT 22
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#define DMACON_BURST_LEN_SHIFT 19
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#define DMACOM_START 4
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#define DMACOM_CLEARBOTHDONE 7
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#define DMAALLST_WCOM0 (1 << 0)
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#define DMAALLST_HCOM0 (1 << 1)
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#define DMAALLST_DMABUSY0 (1 << 2)
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#define DMAALLST_HOLD_SKIP (1 << 3)
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#define DMAALLST_WCOM1 (1 << 4)
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#define DMAALLST_HCOM1 (1 << 5)
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#define DMAALLST_DMABUSY1 (1 << 6)
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#define DMAALLST_WCOM2 (1 << 8)
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#define DMAALLST_HCOM2 (1 << 9)
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#define DMAALLST_DMABUSY2 (1 << 10)
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#define DMAALLST_WCOM3 (1 << 12)
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#define DMAALLST_HCOM3 (1 << 13)
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#define DMAALLST_DMABUSY3 (1 << 14)
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#define DMAALLST_CHAN0_MASK (0xF << 0)
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#define DMAALLST_CHAN1_MASK (0xF << 4)
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#define DMAALLST_CHAN2_MASK (0xF << 8)
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#define DMAALLST_CHAN3_MASK (0xF << 12)
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/////FMC/////
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#define FMCTRL0 (*((uint32_t volatile*)(0x39400000)))
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#define FMCTRL1 (*((uint32_t volatile*)(0x39400004)))
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#define FMCMD (*((uint32_t volatile*)(0x39400008)))
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#define FMADDR0 (*((uint32_t volatile*)(0x3940000C)))
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#define FMADDR1 (*((uint32_t volatile*)(0x39400010)))
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#define FMANUM (*((uint32_t volatile*)(0x3940002C)))
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#define FMDNUM (*((uint32_t volatile*)(0x39400030)))
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#define FMCSTAT (*((uint32_t volatile*)(0x39400048)))
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#define FMFIFO (*((uint32_t volatile*)(0x39400080)))
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#define RS_ECC_CTRL (*((uint32_t volatile*)(0x39400100)))
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#define FMCTRL0_ENABLEDMA (1 << 10)
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#define FMCTRL0_UNK1 (1 << 11)
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#define FMCTRL1_DOTRANSADDR (1 << 0)
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#define FMCTRL1_DOREADDATA (1 << 1)
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#define FMCTRL1_DOWRITEDATA (1 << 2)
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#define FMCTRL1_CLEARWFIFO (1 << 6)
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#define FMCTRL1_CLEARRFIFO (1 << 7)
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#define FMCSTAT_RBB (1 << 0)
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#define FMCSTAT_RBBDONE (1 << 1)
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#define FMCSTAT_CMDDONE (1 << 2)
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#define FMCSTAT_ADDRDONE (1 << 3)
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#define FMCSTAT_BANK0READY (1 << 4)
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#define FMCSTAT_BANK1READY (1 << 5)
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#define FMCSTAT_BANK2READY (1 << 6)
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#define FMCSTAT_BANK3READY (1 << 7)
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/////ECC/////
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#define ECC_DATA_PTR (*((void* volatile*)(0x39E00004)))
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#define ECC_SPARE_PTR (*((void* volatile*)(0x39E00008)))
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#define ECC_CTRL (*((uint32_t volatile*)(0x39E0000C)))
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#define ECC_RESULT (*((uint32_t volatile*)(0x39E00010)))
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#define ECC_UNK1 (*((uint32_t volatile*)(0x39E00014)))
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#define ECC_INT_CLR (*((uint32_t volatile*)(0x39E00040)))
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#define ECCCTRL_STARTDECODING (1 << 0)
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#define ECCCTRL_STARTENCODING (1 << 1)
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#define ECCCTRL_STARTDECNOSYND (1 << 2)
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/////CLICKWHEEL/////
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#define WHEEL00 (*((uint32_t volatile*)(0x3C200000)))
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#define WHEEL04 (*((uint32_t volatile*)(0x3C200004)))
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#define WHEEL08 (*((uint32_t volatile*)(0x3C200008)))
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#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C)))
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#define WHEEL10 (*((uint32_t volatile*)(0x3C200010)))
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#define WHEELINT (*((uint32_t volatile*)(0x3C200014)))
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#define WHEELRX (*((uint32_t volatile*)(0x3C200018)))
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#define WHEELTX (*((uint32_t volatile*)(0x3C20001C)))
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/////AES/////
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#define AESCONTROL (*((uint32_t volatile*)(0x39800000)))
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#define AESGO (*((uint32_t volatile*)(0x39800004)))
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#define AESUNKREG0 (*((uint32_t volatile*)(0x39800008)))
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#define AESSTATUS (*((uint32_t volatile*)(0x3980000C)))
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#define AESUNKREG1 (*((uint32_t volatile*)(0x39800010)))
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#define AESKEYLEN (*((uint32_t volatile*)(0x39800014)))
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#define AESOUTSIZE (*((uint32_t volatile*)(0x39800018)))
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#define AESOUTADDR (*((void* volatile*)(0x39800020)))
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#define AESINSIZE (*((uint32_t volatile*)(0x39800024)))
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#define AESINADDR (*((const void* volatile*)(0x39800028)))
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#define AESAUXSIZE (*((uint32_t volatile*)(0x3980002C)))
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#define AESAUXADDR (*((void* volatile*)(0x39800030)))
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#define AESSIZE3 (*((uint32_t volatile*)(0x39800034)))
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#define AESKEY ((uint32_t volatile*)(0x3980004C))
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#define AESTYPE (*((uint32_t volatile*)(0x3980006C)))
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#define AESIV ((uint32_t volatile*)(0x39800074))
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#define AESTYPE2 (*((uint32_t volatile*)(0x39800088)))
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#define AESUNKREG2 (*((uint32_t volatile*)(0x3980008C)))
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/////HASH/////
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#define HASHCTRL (*((uint32_t volatile*)(0x3C600000)))
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#define HASHRESULT ((uint32_t volatile*)(0x3C600020))
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#define HASHDATAIN ((uint32_t volatile*)(0x3C600040))
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/////TIMER/////
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#define TCON(x) (*((uint32_t volatile*)(0x3C700000 + 0x20 * (x))))
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#define TACON (*((uint32_t volatile*)(0x3C700000)))
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#define TACMD (*((uint32_t volatile*)(0x3C700004)))
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#define TADATA0 (*((uint32_t volatile*)(0x3C700008)))
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#define TADATA1 (*((uint32_t volatile*)(0x3C70000C)))
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#define TAPRE (*((uint32_t volatile*)(0x3C700010)))
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#define TACNT (*((uint32_t volatile*)(0x3C700014)))
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#define TBCON (*((uint32_t volatile*)(0x3C700020)))
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#define TBCMD (*((uint32_t volatile*)(0x3C700024)))
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#define TBDATA0 (*((uint32_t volatile*)(0x3C700028)))
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#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C)))
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262 |
#define TBPRE (*((uint32_t volatile*)(0x3C700030)))
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263 |
#define TBCNT (*((uint32_t volatile*)(0x3C700034)))
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264 |
#define TCCON (*((uint32_t volatile*)(0x3C700040)))
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265 |
#define TCCMD (*((uint32_t volatile*)(0x3C700044)))
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266 |
#define TCDATA0 (*((uint32_t volatile*)(0x3C700048)))
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267 |
#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C)))
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268 |
#define TCPRE (*((uint32_t volatile*)(0x3C700050)))
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269 |
#define TCCNT (*((uint32_t volatile*)(0x3C700054)))
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270 |
#define TDCON (*((uint32_t volatile*)(0x3C700060)))
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271 |
#define TDCMD (*((uint32_t volatile*)(0x3C700064)))
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272 |
#define TDDATA0 (*((uint32_t volatile*)(0x3C700068)))
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273 |
#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C)))
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274 |
#define TDPRE (*((uint32_t volatile*)(0x3C700070)))
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275 |
#define TDCNT (*((uint32_t volatile*)(0x3C700074)))
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276 |
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277 |
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278 |
/////USB/////
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279 |
#define OTGBASE 0x38800000
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280 |
#define PHYBASE 0x3C400000
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281 |
#define SYNOPSYSOTG_CLOCK 0
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282 |
#define SYNOPSYSOTG_AHBCFG 0x27
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283 |
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284 |
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285 |
/////I2C/////
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286 |
#define IICCON (*((uint32_t volatile*)(0x3C900000)))
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287 |
#define IICSTAT (*((uint32_t volatile*)(0x3C900004)))
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288 |
#define IICADD (*((uint32_t volatile*)(0x3C900008)))
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289 |
#define IICDS (*((uint32_t volatile*)(0x3C90000C)))
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290 |
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291 |
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292 |
/////LCD/////
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293 |
#define LCDCON (*((uint32_t volatile*)(0x38600000)))
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294 |
#define LCDWCMD (*((uint32_t volatile*)(0x38600004)))
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295 |
#define LCDPHTIME (*((uint32_t volatile*)(0x38600010)))
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296 |
#define LCDSTATUS (*((uint32_t volatile*)(0x3860001c)))
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297 |
#define LCDWDATA (*((uint32_t volatile*)(0x38600040)))
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298 |
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299 |
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300 |
/////CLOCK GATES/////
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301 |
#define CLOCKGATE_USB_1 14
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302 |
#define CLOCKGATE_USB_2 43
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303 |
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304 |
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305 |
/////INTERRUPTS/////
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306 |
#define IRQ_TIMER 5
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307 |
#define IRQ_DMA 10
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308 |
#define IRQ_USB_FUNC 16
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309 |
#define IRQ_ECC 19
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310 |
#define IRQ_WHEEL 26
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311 |
#define IRQ_IIC 27
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312 |
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313 |
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314 |
#endif
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