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//
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//
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//    Copyright 2010 TheSeven
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//
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//
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//    This file is part of emCORE.
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//
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//    emCORE is free software: you can redistribute it and/or
2 theseven 9
//    modify it under the terms of the GNU General Public License as
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//    published by the Free Software Foundation, either version 2 of the
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//    License, or (at your option) any later version.
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//
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//    emCORE is distributed in the hope that it will be useful,
2 theseven 14
//    but WITHOUT ANY WARRANTY; without even the implied warranty of
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//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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//    See the GNU General Public License for more details.
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//
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//    You should have received a copy of the GNU General Public License along
427 farthen 19
//    with emCORE.  If not, see <http://www.gnu.org/licenses/>.
2 theseven 20
//
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//
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#ifndef __S5L8701_H__
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#define __S5L8701_H__
26
 
27
#include "global.h"
28
 
29
 
30
/////CLKCON/////
265 theseven 31
#define CLKCON       (*((uint32_t volatile*)(0x3C500000)))
32
#define PLL0PMS      (*((uint32_t volatile*)(0x3C500004)))
33
#define PLL1PMS      (*((uint32_t volatile*)(0x3C500008)))
34
#define PLL2PMS      (*((uint32_t volatile*)(0x3C50000C)))
35
#define PLL0LCNT     (*((uint32_t volatile*)(0x3C500014)))
36
#define PLL1LCNT     (*((uint32_t volatile*)(0x3C500018)))
37
#define PLL2LCNT     (*((uint32_t volatile*)(0x3C50001C)))
38
#define PLLLOCK      (*((uint32_t volatile*)(0x3C500020)))
39
#define PLLCON       (*((uint32_t volatile*)(0x3C500024)))
40
#define PWRMODE      (*((uint32_t volatile*)(0x3C50002C)))
41
#define SWRCON       (*((uint32_t volatile*)(0x3C500030)))
42
#define RSTSR        (*((uint32_t volatile*)(0x3C500034)))
43
#define DSPCLKMD     (*((uint32_t volatile*)(0x3C500038)))
44
#define CLKCON2      (*((uint32_t volatile*)(0x3C50003C)))
45
#define PWRCON(i)    (*((uint32_t volatile*)(0x3C500000 + ((i) == 1 ? 0x40 : 0x28))))
2 theseven 46
 
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48
/////ICU/////
265 theseven 49
#define SRCPND       (*((uint32_t volatile*)(0x39C00000)))
50
#define INTMOD       (*((uint32_t volatile*)(0x39C00004)))
51
#define INTMSK       (*((uint32_t volatile*)(0x39C00008)))
52
#define INTPRIO      (*((uint32_t volatile*)(0x39C0000C)))
53
#define INTPND       (*((uint32_t volatile*)(0x39C00010)))
54
#define INTOFFSET    (*((uint32_t volatile*)(0x39C00014)))
55
#define EINTPOL      (*((uint32_t volatile*)(0x39C00018)))
56
#define EINTPEND     (*((uint32_t volatile*)(0x39C0001C)))
57
#define EINTMSK      (*((uint32_t volatile*)(0x39C00020)))
2 theseven 58
 
59
 
60
/////GPIO/////
265 theseven 61
#define PCON0        (*((uint32_t volatile*)(0x3CF00000)))
62
#define PDAT0        (*((uint32_t volatile*)(0x3CF00004)))
63
#define PCON1        (*((uint32_t volatile*)(0x3CF00010)))
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#define PDAT1        (*((uint32_t volatile*)(0x3CF00014)))
65
#define PCON2        (*((uint32_t volatile*)(0x3CF00020)))
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#define PDAT2        (*((uint32_t volatile*)(0x3CF00024)))
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#define PCON3        (*((uint32_t volatile*)(0x3CF00030)))
68
#define PDAT3        (*((uint32_t volatile*)(0x3CF00034)))
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#define PCON4        (*((uint32_t volatile*)(0x3CF00040)))
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#define PDAT4        (*((uint32_t volatile*)(0x3CF00044)))
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#define PCON5        (*((uint32_t volatile*)(0x3CF00050)))
72
#define PDAT5        (*((uint32_t volatile*)(0x3CF00054)))
73
#define PUNK5        (*((uint32_t volatile*)(0x3CF0005C)))
74
#define PCON6        (*((uint32_t volatile*)(0x3CF00060)))
75
#define PDAT6        (*((uint32_t volatile*)(0x3CF00064)))
76
#define PCON7        (*((uint32_t volatile*)(0x3CF00070)))
77
#define PDAT7        (*((uint32_t volatile*)(0x3CF00074)))
78
#define PCON10       (*((uint32_t volatile*)(0x3CF000A0)))
79
#define PDAT10       (*((uint32_t volatile*)(0x3CF000A4)))
80
#define PCON11       (*((uint32_t volatile*)(0x3CF000B0)))
81
#define PDAT11       (*((uint32_t volatile*)(0x3CF000B4)))
492 theseven 82
#define PCON13       (*((uint32_t volatile*)(0x3CF000D0)))
83
#define PDAT13       (*((uint32_t volatile*)(0x3CF000D4)))
265 theseven 84
#define PCON14       (*((uint32_t volatile*)(0x3CF000E0)))
85
#define PDAT14       (*((uint32_t volatile*)(0x3CF000E4)))
86
#define PCON15       (*((uint32_t volatile*)(0x3CF000F0)))
87
#define PUNK15       (*((uint32_t volatile*)(0x3CF000FC)))
2 theseven 88
 
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90
/////IODMA/////
265 theseven 91
#define DMABASE0     (*((void* volatile*)(0x38400000)))
92
#define DMACON0      (*((uint32_t volatile*)(0x38400004)))
93
#define DMATCNT0     (*((uint32_t volatile*)(0x38400008)))
94
#define DMACADDR0    (*((void* volatile*)(0x3840000C)))
95
#define DMACTCNT0    (*((uint32_t volatile*)(0x38400010)))
96
#define DMACOM0      (*((uint32_t volatile*)(0x38400014)))
97
#define DMANOF0      (*((uint32_t volatile*)(0x38400018)))
98
#define DMABASE1     (*((void* volatile*)(0x38400020)))
99
#define DMACON1      (*((uint32_t volatile*)(0x38400024)))
100
#define DMATCNT1     (*((uint32_t volatile*)(0x38400028)))
101
#define DMACADDR1    (*((void* volatile*)(0x3840002C)))
102
#define DMACTCNT1    (*((uint32_t volatile*)(0x38400030)))
103
#define DMACOM1      (*((uint32_t volatile*)(0x38400034)))
104
#define DMABASE2     (*((void* volatile*)(0x38400040)))
105
#define DMACON2      (*((uint32_t volatile*)(0x38400044)))
106
#define DMATCNT2     (*((uint32_t volatile*)(0x38400048)))
107
#define DMACADDR2    (*((void* volatile*)(0x3840004C)))
108
#define DMACTCNT2    (*((uint32_t volatile*)(0x38400050)))
109
#define DMACOM2      (*((uint32_t volatile*)(0x38400054)))
110
#define DMABASE3     (*((void* volatile*)(0x38400060)))
111
#define DMACON3      (*((uint32_t volatile*)(0x38400064)))
112
#define DMATCNT3     (*((uint32_t volatile*)(0x38400068)))
113
#define DMACADDR3    (*((void* volatile*)(0x3840006C)))
114
#define DMACTCNT3    (*((uint32_t volatile*)(0x38400070)))
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#define DMACOM3      (*((uint32_t volatile*)(0x38400074)))
116
#define DMABASE4     (*((void* volatile*)(0x38400080)))
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#define DMACON4      (*((uint32_t volatile*)(0x38400084)))
118
#define DMATCNT4     (*((uint32_t volatile*)(0x38400088)))
119
#define DMACADDR4    (*((void* volatile*)(0x3840008C)))
120
#define DMACTCNT4    (*((uint32_t volatile*)(0x38400090)))
121
#define DMACOM4      (*((uint32_t volatile*)(0x38400094)))
122
#define DMABASE5     (*((void* volatile*)(0x384000A0)))
123
#define DMACON5      (*((uint32_t volatile*)(0x384000A4)))
124
#define DMATCNT5     (*((uint32_t volatile*)(0x384000A8)))
125
#define DMACADDR5    (*((void* volatile*)(0x384000AC)))
126
#define DMACTCNT5    (*((uint32_t volatile*)(0x384000B0)))
127
#define DMACOM5      (*((uint32_t volatile*)(0x384000B4)))
128
#define DMABASE6     (*((void* volatile*)(0x384000C0)))
129
#define DMACON6      (*((uint32_t volatile*)(0x384000C4)))
130
#define DMATCNT6     (*((uint32_t volatile*)(0x384000C8)))
131
#define DMACADDR6    (*((void* volatile*)(0x384000CC)))
132
#define DMACTCNT6    (*((uint32_t volatile*)(0x384000D0)))
133
#define DMACOM6      (*((uint32_t volatile*)(0x384000D4)))
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#define DMABASE7     (*((void* volatile*)(0x384000E0)))
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#define DMACON7      (*((uint32_t volatile*)(0x384000E4)))
136
#define DMATCNT7     (*((uint32_t volatile*)(0x384000E8)))
137
#define DMACADDR7    (*((void* volatile*)(0x384000EC)))
138
#define DMACTCNT7    (*((uint32_t volatile*)(0x384000F0)))
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#define DMACOM7      (*((uint32_t volatile*)(0x384000F4)))
140
#define DMABASE8     (*((void* volatile*)(0x38400100)))
141
#define DMACON8      (*((uint32_t volatile*)(0x38400104)))
142
#define DMATCNT8     (*((uint32_t volatile*)(0x38400108)))
143
#define DMACADDR8    (*((void* volatile*)(0x3840010C)))
144
#define DMACTCNT8    (*((uint32_t volatile*)(0x38400110)))
145
#define DMACOM8      (*((uint32_t volatile*)(0x38400114)))
146
#define DMAALLST     (*((uint32_t volatile*)(0x38400180)))
147
#define DMAALLST2    (*((uint32_t volatile*)(0x38400184)))
2 theseven 148
#define DMACON_DEVICE_SHIFT    30
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#define DMACON_DIRECTION_SHIFT 29
150
#define DMACON_DATA_SIZE_SHIFT 22
151
#define DMACON_BURST_LEN_SHIFT 19
152
#define DMACOM_START           4
153
#define DMACOM_CLEARBOTHDONE   7
154
#define DMAALLST_WCOM0         (1 << 0)
155
#define DMAALLST_HCOM0         (1 << 1)
156
#define DMAALLST_DMABUSY0      (1 << 2)
157
#define DMAALLST_HOLD_SKIP     (1 << 3)
158
#define DMAALLST_WCOM1         (1 << 4)
159
#define DMAALLST_HCOM1         (1 << 5)
160
#define DMAALLST_DMABUSY1      (1 << 6)
161
#define DMAALLST_WCOM2         (1 << 8)
162
#define DMAALLST_HCOM2         (1 << 9)
163
#define DMAALLST_DMABUSY2      (1 << 10)
164
#define DMAALLST_WCOM3         (1 << 12)
165
#define DMAALLST_HCOM3         (1 << 13)
166
#define DMAALLST_DMABUSY3      (1 << 14)
167
#define DMAALLST_CHAN0_MASK    (0xF << 0)
168
#define DMAALLST_CHAN1_MASK    (0xF << 4)
169
#define DMAALLST_CHAN2_MASK    (0xF << 8)
170
#define DMAALLST_CHAN3_MASK    (0xF << 12)
171
 
172
 
173
/////FMC/////
265 theseven 174
#define FMCTRL0      (*((uint32_t volatile*)(0x39400000)))
175
#define FMCTRL1      (*((uint32_t volatile*)(0x39400004)))
176
#define FMCMD        (*((uint32_t volatile*)(0x39400008)))
177
#define FMADDR0      (*((uint32_t volatile*)(0x3940000C)))
178
#define FMADDR1      (*((uint32_t volatile*)(0x39400010)))
179
#define FMANUM       (*((uint32_t volatile*)(0x3940002C)))
180
#define FMDNUM       (*((uint32_t volatile*)(0x39400030)))
181
#define FMCSTAT      (*((uint32_t volatile*)(0x39400048)))
182
#define FMFIFO       (*((uint32_t volatile*)(0x39400080)))
183
#define RS_ECC_CTRL  (*((uint32_t volatile*)(0x39400100)))
2 theseven 184
#define FMCTRL0_ENABLEDMA      (1 << 10)
185
#define FMCTRL0_UNK1           (1 << 11)
186
#define FMCTRL1_DOTRANSADDR    (1 << 0)
187
#define FMCTRL1_DOREADDATA     (1 << 1)
188
#define FMCTRL1_DOWRITEDATA    (1 << 2)
189
#define FMCTRL1_CLEARWFIFO     (1 << 6)
190
#define FMCTRL1_CLEARRFIFO     (1 << 7)
191
#define FMCSTAT_RBB            (1 << 0)
192
#define FMCSTAT_RBBDONE        (1 << 1)
193
#define FMCSTAT_CMDDONE        (1 << 2)
194
#define FMCSTAT_ADDRDONE       (1 << 3)
195
#define FMCSTAT_BANK0READY     (1 << 4)
196
#define FMCSTAT_BANK1READY     (1 << 5)
197
#define FMCSTAT_BANK2READY     (1 << 6)
198
#define FMCSTAT_BANK3READY     (1 << 7)
199
 
200
 
201
/////ECC/////
265 theseven 202
#define ECC_DATA_PTR  (*((void* volatile*)(0x39E00004)))
203
#define ECC_SPARE_PTR (*((void* volatile*)(0x39E00008)))
204
#define ECC_CTRL      (*((uint32_t volatile*)(0x39E0000C)))
205
#define ECC_RESULT    (*((uint32_t volatile*)(0x39E00010)))
206
#define ECC_UNK1      (*((uint32_t volatile*)(0x39E00014)))
207
#define ECC_INT_CLR   (*((uint32_t volatile*)(0x39E00040)))
2 theseven 208
#define ECCCTRL_STARTDECODING  (1 << 0)
209
#define ECCCTRL_STARTENCODING  (1 << 1)
210
#define ECCCTRL_STARTDECNOSYND (1 << 2)
211
 
212
 
213
/////CLICKWHEEL/////
265 theseven 214
#define WHEEL00      (*((uint32_t volatile*)(0x3C200000)))
215
#define WHEEL04      (*((uint32_t volatile*)(0x3C200004)))
216
#define WHEEL08      (*((uint32_t volatile*)(0x3C200008)))
217
#define WHEEL0C      (*((uint32_t volatile*)(0x3C20000C)))
218
#define WHEEL10      (*((uint32_t volatile*)(0x3C200010)))
219
#define WHEELINT     (*((uint32_t volatile*)(0x3C200014)))
220
#define WHEELRX      (*((uint32_t volatile*)(0x3C200018)))
221
#define WHEELTX      (*((uint32_t volatile*)(0x3C20001C)))
2 theseven 222
 
223
 
224
/////AES/////
265 theseven 225
#define AESCONTROL   (*((uint32_t volatile*)(0x39800000)))
226
#define AESGO        (*((uint32_t volatile*)(0x39800004)))
227
#define AESUNKREG0   (*((uint32_t volatile*)(0x39800008)))
228
#define AESSTATUS    (*((uint32_t volatile*)(0x3980000C)))
229
#define AESUNKREG1   (*((uint32_t volatile*)(0x39800010)))
230
#define AESKEYLEN    (*((uint32_t volatile*)(0x39800014)))
231
#define AESOUTSIZE   (*((uint32_t volatile*)(0x39800018)))
232
#define AESOUTADDR   (*((void* volatile*)(0x39800020)))
233
#define AESINSIZE    (*((uint32_t volatile*)(0x39800024)))
234
#define AESINADDR    (*((const void* volatile*)(0x39800028)))
235
#define AESAUXSIZE   (*((uint32_t volatile*)(0x3980002C)))
236
#define AESAUXADDR   (*((void* volatile*)(0x39800030)))
237
#define AESSIZE3     (*((uint32_t volatile*)(0x39800034)))
238
#define AESKEY         ((uint32_t volatile*)(0x3980004C))
239
#define AESTYPE      (*((uint32_t volatile*)(0x3980006C)))
240
#define AESIV          ((uint32_t volatile*)(0x39800074))
241
#define AESTYPE2     (*((uint32_t volatile*)(0x39800088)))
242
#define AESUNKREG2   (*((uint32_t volatile*)(0x3980008C)))
2 theseven 243
 
244
/////HASH/////
265 theseven 245
#define HASHCTRL     (*((uint32_t volatile*)(0x3C600000)))
246
#define HASHRESULT     ((uint32_t volatile*)(0x3C600020))
247
#define HASHDATAIN     ((uint32_t volatile*)(0x3C600040))
2 theseven 248
 
249
 
250
/////TIMER/////
265 theseven 251
#define TACON        (*((uint32_t volatile*)(0x3C700000)))
252
#define TACMD        (*((uint32_t volatile*)(0x3C700004)))
253
#define TADATA0      (*((uint32_t volatile*)(0x3C700008)))
254
#define TADATA1      (*((uint32_t volatile*)(0x3C70000C)))
255
#define TAPRE        (*((uint32_t volatile*)(0x3C700010)))
256
#define TACNT        (*((uint32_t volatile*)(0x3C700014)))
257
#define TBCON        (*((uint32_t volatile*)(0x3C700020)))
258
#define TBCMD        (*((uint32_t volatile*)(0x3C700024)))
259
#define TBDATA0      (*((uint32_t volatile*)(0x3C700028)))
260
#define TBDATA1      (*((uint32_t volatile*)(0x3C70002C)))
261
#define TBPRE        (*((uint32_t volatile*)(0x3C700030)))
262
#define TBCNT        (*((uint32_t volatile*)(0x3C700034)))
263
#define TCCON        (*((uint32_t volatile*)(0x3C700040)))
264
#define TCCMD        (*((uint32_t volatile*)(0x3C700044)))
265
#define TCDATA0      (*((uint32_t volatile*)(0x3C700048)))
266
#define TCDATA1      (*((uint32_t volatile*)(0x3C70004C)))
267
#define TCPRE        (*((uint32_t volatile*)(0x3C700050)))
268
#define TCCNT        (*((uint32_t volatile*)(0x3C700054)))
269
#define TDCON        (*((uint32_t volatile*)(0x3C700060)))
270
#define TDCMD        (*((uint32_t volatile*)(0x3C700064)))
271
#define TDDATA0      (*((uint32_t volatile*)(0x3C700068)))
272
#define TDDATA1      (*((uint32_t volatile*)(0x3C70006C)))
273
#define TDPRE        (*((uint32_t volatile*)(0x3C700070)))
274
#define TDCNT        (*((uint32_t volatile*)(0x3C700074)))
2 theseven 275
 
276
 
15 theseven 277
/////USB/////
278
#define OTGBASE 0x38800000
279
#define PHYBASE 0x3C400000
265 theseven 280
#define SYNOPSYSOTG_CLOCK 0
281
#define SYNOPSYSOTG_AHBCFG 0x27
15 theseven 282
 
283
 
284
/////I2C/////
265 theseven 285
#define IICCON       (*((uint32_t volatile*)(0x3C900000)))
286
#define IICSTAT      (*((uint32_t volatile*)(0x3C900004)))
287
#define IICADD       (*((uint32_t volatile*)(0x3C900008)))
288
#define IICDS        (*((uint32_t volatile*)(0x3C90000C)))
15 theseven 289
 
290
 
492 theseven 291
/////LCD/////
292
#define LCDCON    (*((uint32_t volatile*)(0x38600040)))
293
#define LCDWCMD   (*((uint32_t volatile*)(0x38600004)))
294
#define LCDPHTIME (*((uint32_t volatile*)(0x38600010)))
295
#define LCDSTATUS (*((uint32_t volatile*)(0x3860001c)))
296
#define LCDWDATA  (*((uint32_t volatile*)(0x38600040)))
297
 
298
 
87 theseven 299
/////CLOCK GATES/////
300
#define CLOCKGATE_USB_1 14
301
#define CLOCKGATE_USB_2 43
302
 
303
 
15 theseven 304
/////INTERRUPTS/////
85 theseven 305
#define IRQ_TIMER    5
306
#define IRQ_DMA      10
307
#define IRQ_USB_FUNC 16
308
#define IRQ_ECC      19
132 theseven 309
#define IRQ_WHEEL    26
85 theseven 310
#define IRQ_IIC      27
15 theseven 311
 
312
 
2 theseven 313
#endif