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//
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//
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// Copyright 2010 TheSeven
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//
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//
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// This file is part of emBIOS.
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//
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// emBIOS is free software: you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as
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// published by the Free Software Foundation, either version 2 of the
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// License, or (at your option) any later version.
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//
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// emBIOS is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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// See the GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with emBIOS. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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#ifndef __SYNOPSYSOTG_H__
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#define __SYNOPSYSOTG_H__
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#include "global.h"
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#ifdef TARGET_ipodnano2g
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#include "s5l8701.h"
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#endif
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/*** OTG PHY CONTROL REGISTERS ***/
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#define OPHYPWR (*((volatile uint32_t*)(PHYBASE + 0x000)))
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#define OPHYCLK (*((volatile uint32_t*)(PHYBASE + 0x004)))
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#define ORSTCON (*((volatile uint32_t*)(PHYBASE + 0x008)))
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#define OPHYUNK1 (*((volatile uint32_t*)(PHYBASE + 0x01c)))
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#define OPHYUNK2 (*((volatile uint32_t*)(PHYBASE + 0x044)))
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/*** OTG LINK CORE REGISTERS ***/
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/* Core Global Registers */
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#define GOTGCTL (*((volatile uint32_t*)(OTGBASE + 0x000)))
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#define GOTGINT (*((volatile uint32_t*)(OTGBASE + 0x004)))
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#define GAHBCFG (*((volatile uint32_t*)(OTGBASE + 0x008)))
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#define GUSBCFG (*((volatile uint32_t*)(OTGBASE + 0x00C)))
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#define GRSTCTL (*((volatile uint32_t*)(OTGBASE + 0x010)))
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#define GINTSTS (*((volatile uint32_t*)(OTGBASE + 0x014)))
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#define GINTMSK (*((volatile uint32_t*)(OTGBASE + 0x018)))
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#define GRXSTSR (*((volatile uint32_t*)(OTGBASE + 0x01C)))
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#define GRXSTSP (*((volatile uint32_t*)(OTGBASE + 0x020)))
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#define GRXFSIZ (*((volatile uint32_t*)(OTGBASE + 0x024)))
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#define GNPTXFSIZ (*((volatile uint32_t*)(OTGBASE + 0x028)))
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#define GNPTXSTS (*((volatile uint32_t*)(OTGBASE + 0x02C)))
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#define HPTXFSIZ (*((volatile uint32_t*)(OTGBASE + 0x100)))
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#define DPTXFSIZ(x) (*((volatile uint32_t*)(OTGBASE + 0x100 + 4 * x)))
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#define DPTXFSIZ1 (*((volatile uint32_t*)(OTGBASE + 0x104)))
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#define DPTXFSIZ2 (*((volatile uint32_t*)(OTGBASE + 0x108)))
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#define DPTXFSIZ3 (*((volatile uint32_t*)(OTGBASE + 0x10C)))
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#define DPTXFSIZ4 (*((volatile uint32_t*)(OTGBASE + 0x110)))
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#define DPTXFSIZ5 (*((volatile uint32_t*)(OTGBASE + 0x114)))
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#define DPTXFSIZ6 (*((volatile uint32_t*)(OTGBASE + 0x118)))
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#define DPTXFSIZ7 (*((volatile uint32_t*)(OTGBASE + 0x11C)))
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#define DPTXFSIZ8 (*((volatile uint32_t*)(OTGBASE + 0x120)))
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#define DPTXFSIZ9 (*((volatile uint32_t*)(OTGBASE + 0x124)))
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#define DPTXFSIZ10 (*((volatile uint32_t*)(OTGBASE + 0x128)))
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#define DPTXFSIZ11 (*((volatile uint32_t*)(OTGBASE + 0x12C)))
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#define DPTXFSIZ12 (*((volatile uint32_t*)(OTGBASE + 0x130)))
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#define DPTXFSIZ13 (*((volatile uint32_t*)(OTGBASE + 0x134)))
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#define DPTXFSIZ14 (*((volatile uint32_t*)(OTGBASE + 0x138)))
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#define DPTXFSIZ15 (*((volatile uint32_t*)(OTGBASE + 0x13C)))
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/*** HOST MODE REGISTERS ***/
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/* Host Global Registers */
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#define HCFG (*((volatile uint32_t*)(OTGBASE + 0x400)))
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#define HFIR (*((volatile uint32_t*)(OTGBASE + 0x404)))
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#define HFNUM (*((volatile uint32_t*)(OTGBASE + 0x408)))
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#define HPTXSTS (*((volatile uint32_t*)(OTGBASE + 0x410)))
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#define HAINT (*((volatile uint32_t*)(OTGBASE + 0x414)))
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#define HAINTMSK (*((volatile uint32_t*)(OTGBASE + 0x418)))
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/* Host Port Control and Status Registers */
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#define HPRT (*((volatile uint32_t*)(OTGBASE + 0x440)))
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/* Host Channel-Specific Registers */
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#define HCCHAR(x) (*((volatile uint32_t*)(OTGBASE + 0x500 + 0x20 * x)))
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#define HCSPLT(x) (*((volatile uint32_t*)(OTGBASE + 0x504 + 0x20 * x)))
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#define HCINT(x) (*((volatile uint32_t*)(OTGBASE + 0x508 + 0x20 * x)))
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#define HCINTMSK(x) (*((volatile uint32_t*)(OTGBASE + 0x50C + 0x20 * x)))
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#define HCTSIZ(x) (*((volatile uint32_t*)(OTGBASE + 0x510 + 0x20 * x)))
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#define HCDMA(x) (*((volatile uint32_t*)(OTGBASE + 0x514 + 0x20 * x)))
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#define HCCHAR0 (*((volatile uint32_t*)(OTGBASE + 0x500)))
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#define HCSPLT0 (*((volatile uint32_t*)(OTGBASE + 0x504)))
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#define HCINT0 (*((volatile uint32_t*)(OTGBASE + 0x508)))
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#define HCINTMSK0 (*((volatile uint32_t*)(OTGBASE + 0x50C)))
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#define HCTSIZ0 (*((volatile uint32_t*)(OTGBASE + 0x510)))
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#define HCDMA0 (*((volatile uint32_t*)(OTGBASE + 0x514)))
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#define HCCHAR1 (*((volatile uint32_t*)(OTGBASE + 0x520)))
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#define HCSPLT1 (*((volatile uint32_t*)(OTGBASE + 0x524)))
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#define HCINT1 (*((volatile uint32_t*)(OTGBASE + 0x528)))
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#define HCINTMSK1 (*((volatile uint32_t*)(OTGBASE + 0x52C)))
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#define HCTSIZ1 (*((volatile uint32_t*)(OTGBASE + 0x530)))
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#define HCDMA1 (*((volatile uint32_t*)(OTGBASE + 0x534)))
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#define HCCHAR2 (*((volatile uint32_t*)(OTGBASE + 0x540)))
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#define HCSPLT2 (*((volatile uint32_t*)(OTGBASE + 0x544)))
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#define HCINT2 (*((volatile uint32_t*)(OTGBASE + 0x548)))
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#define HCINTMSK2 (*((volatile uint32_t*)(OTGBASE + 0x54C)))
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#define HCTSIZ2 (*((volatile uint32_t*)(OTGBASE + 0x550)))
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#define HCDMA2 (*((volatile uint32_t*)(OTGBASE + 0x554)))
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#define HCCHAR3 (*((volatile uint32_t*)(OTGBASE + 0x560)))
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#define HCSPLT3 (*((volatile uint32_t*)(OTGBASE + 0x564)))
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#define HCINT3 (*((volatile uint32_t*)(OTGBASE + 0x568)))
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#define HCINTMSK3 (*((volatile uint32_t*)(OTGBASE + 0x56C)))
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#define HCTSIZ3 (*((volatile uint32_t*)(OTGBASE + 0x570)))
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#define HCDMA3 (*((volatile uint32_t*)(OTGBASE + 0x574)))
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#define HCCHAR4 (*((volatile uint32_t*)(OTGBASE + 0x580)))
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#define HCSPLT4 (*((volatile uint32_t*)(OTGBASE + 0x584)))
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#define HCINT4 (*((volatile uint32_t*)(OTGBASE + 0x588)))
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#define HCINTMSK4 (*((volatile uint32_t*)(OTGBASE + 0x58C)))
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#define HCTSIZ4 (*((volatile uint32_t*)(OTGBASE + 0x590)))
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#define HCDMA4 (*((volatile uint32_t*)(OTGBASE + 0x594)))
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#define HCCHAR5 (*((volatile uint32_t*)(OTGBASE + 0x5A0)))
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#define HCSPLT5 (*((volatile uint32_t*)(OTGBASE + 0x5A4)))
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#define HCINT5 (*((volatile uint32_t*)(OTGBASE + 0x5A8)))
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#define HCINTMSK5 (*((volatile uint32_t*)(OTGBASE + 0x5AC)))
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#define HCTSIZ5 (*((volatile uint32_t*)(OTGBASE + 0x5B0)))
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#define HCDMA5 (*((volatile uint32_t*)(OTGBASE + 0x5B4)))
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#define HCCHAR6 (*((volatile uint32_t*)(OTGBASE + 0x5C0)))
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#define HCSPLT6 (*((volatile uint32_t*)(OTGBASE + 0x5C4)))
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#define HCINT6 (*((volatile uint32_t*)(OTGBASE + 0x5C8)))
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#define HCINTMSK6 (*((volatile uint32_t*)(OTGBASE + 0x5CC)))
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#define HCTSIZ6 (*((volatile uint32_t*)(OTGBASE + 0x5D0)))
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#define HCDMA6 (*((volatile uint32_t*)(OTGBASE + 0x5D4)))
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#define HCCHAR7 (*((volatile uint32_t*)(OTGBASE + 0x5E0)))
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#define HCSPLT7 (*((volatile uint32_t*)(OTGBASE + 0x5E4)))
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#define HCINT7 (*((volatile uint32_t*)(OTGBASE + 0x5E8)))
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#define HCINTMSK7 (*((volatile uint32_t*)(OTGBASE + 0x5EC)))
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#define HCTSIZ7 (*((volatile uint32_t*)(OTGBASE + 0x5F0)))
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#define HCDMA7 (*((volatile uint32_t*)(OTGBASE + 0x5F4)))
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#define HCCHAR8 (*((volatile uint32_t*)(OTGBASE + 0x600)))
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#define HCSPLT8 (*((volatile uint32_t*)(OTGBASE + 0x604)))
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#define HCINT8 (*((volatile uint32_t*)(OTGBASE + 0x608)))
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#define HCINTMSK8 (*((volatile uint32_t*)(OTGBASE + 0x60C)))
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#define HCTSIZ8 (*((volatile uint32_t*)(OTGBASE + 0x610)))
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#define HCDMA8 (*((volatile uint32_t*)(OTGBASE + 0x614)))
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#define HCCHAR9 (*((volatile uint32_t*)(OTGBASE + 0x620)))
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#define HCSPLT9 (*((volatile uint32_t*)(OTGBASE + 0x624)))
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#define HCINT9 (*((volatile uint32_t*)(OTGBASE + 0x628)))
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#define HCINTMSK9 (*((volatile uint32_t*)(OTGBASE + 0x62C)))
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#define HCTSIZ9 (*((volatile uint32_t*)(OTGBASE + 0x630)))
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#define HCDMA9 (*((volatile uint32_t*)(OTGBASE + 0x634)))
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#define HCCHAR10 (*((volatile uint32_t*)(OTGBASE + 0x640)))
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#define HCSPLT10 (*((volatile uint32_t*)(OTGBASE + 0x644)))
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#define HCINT10 (*((volatile uint32_t*)(OTGBASE + 0x648)))
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#define HCINTMSK10 (*((volatile uint32_t*)(OTGBASE + 0x64C)))
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#define HCTSIZ10 (*((volatile uint32_t*)(OTGBASE + 0x650)))
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#define HCDMA10 (*((volatile uint32_t*)(OTGBASE + 0x654)))
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#define HCCHAR11 (*((volatile uint32_t*)(OTGBASE + 0x660)))
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#define HCSPLT11 (*((volatile uint32_t*)(OTGBASE + 0x664)))
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#define HCINT11 (*((volatile uint32_t*)(OTGBASE + 0x668)))
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#define HCINTMSK11 (*((volatile uint32_t*)(OTGBASE + 0x66C)))
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#define HCTSIZ11 (*((volatile uint32_t*)(OTGBASE + 0x670)))
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#define HCDMA11 (*((volatile uint32_t*)(OTGBASE + 0x674)))
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#define HCCHAR12 (*((volatile uint32_t*)(OTGBASE + 0x680)))
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#define HCSPLT12 (*((volatile uint32_t*)(OTGBASE + 0x684)))
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#define HCINT12 (*((volatile uint32_t*)(OTGBASE + 0x688)))
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#define HCINTMSK12 (*((volatile uint32_t*)(OTGBASE + 0x68C)))
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#define HCTSIZ12 (*((volatile uint32_t*)(OTGBASE + 0x690)))
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#define HCDMA12 (*((volatile uint32_t*)(OTGBASE + 0x694)))
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#define HCCHAR13 (*((volatile uint32_t*)(OTGBASE + 0x6A0)))
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#define HCSPLT13 (*((volatile uint32_t*)(OTGBASE + 0x6A4)))
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#define HCINT13 (*((volatile uint32_t*)(OTGBASE + 0x6A8)))
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#define HCINTMSK13 (*((volatile uint32_t*)(OTGBASE + 0x6AC)))
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#define HCTSIZ13 (*((volatile uint32_t*)(OTGBASE + 0x6B0)))
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#define HCDMA13 (*((volatile uint32_t*)(OTGBASE + 0x6B4)))
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#define HCCHAR14 (*((volatile uint32_t*)(OTGBASE + 0x6C0)))
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#define HCSPLT14 (*((volatile uint32_t*)(OTGBASE + 0x6C4)))
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#define HCINT14 (*((volatile uint32_t*)(OTGBASE + 0x6C8)))
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#define HCINTMSK14 (*((volatile uint32_t*)(OTGBASE + 0x6CC)))
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#define HCTSIZ14 (*((volatile uint32_t*)(OTGBASE + 0x6D0)))
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#define HCDMA14 (*((volatile uint32_t*)(OTGBASE + 0x6D4)))
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#define HCCHAR15 (*((volatile uint32_t*)(OTGBASE + 0x6E0)))
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#define HCSPLT15 (*((volatile uint32_t*)(OTGBASE + 0x6E4)))
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#define HCINT15 (*((volatile uint32_t*)(OTGBASE + 0x6E8)))
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#define HCINTMSK15 (*((volatile uint32_t*)(OTGBASE + 0x6EC)))
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#define HCTSIZ15 (*((volatile uint32_t*)(OTGBASE + 0x6F0)))
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#define HCDMA15 (*((volatile uint32_t*)(OTGBASE + 0x6F4)))
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/*** DEVICE MODE REGISTERS ***/
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/* Device Global Registers */
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#define DCFG (*((volatile uint32_t*)(OTGBASE + 0x800)))
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#define DCTL (*((volatile uint32_t*)(OTGBASE + 0x804)))
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#define DSTS (*((volatile uint32_t*)(OTGBASE + 0x808)))
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#define DIEPMSK (*((volatile uint32_t*)(OTGBASE + 0x810)))
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#define DOEPMSK (*((volatile uint32_t*)(OTGBASE + 0x814)))
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#define DAINT (*((volatile uint32_t*)(OTGBASE + 0x818)))
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#define DAINTMSK (*((volatile uint32_t*)(OTGBASE + 0x81C)))
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#define DTKNQR1 (*((volatile uint32_t*)(OTGBASE + 0x820)))
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#define DTKNQR2 (*((volatile uint32_t*)(OTGBASE + 0x824)))
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#define DVBUSDIS (*((volatile uint32_t*)(OTGBASE + 0x828)))
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#define DVBUSPULSE (*((volatile uint32_t*)(OTGBASE + 0x82C)))
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#define DTKNQR3 (*((volatile uint32_t*)(OTGBASE + 0x830)))
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#define DTKNQR4 (*((volatile uint32_t*)(OTGBASE + 0x834)))
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/* Device Logical IN Endpoint-Specific Registers */
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#define DIEPCTL(x) (*((volatile uint32_t*)(OTGBASE + 0x900 + 0x20 * x)))
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#define DIEPINT(x) (*((volatile uint32_t*)(OTGBASE + 0x908 + 0x20 * x)))
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#define DIEPTSIZ(x) (*((volatile uint32_t*)(OTGBASE + 0x910 + 0x20 * x)))
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#define DIEPDMA(x) (*((volatile uint32_t*)(OTGBASE + 0x914 + 0x20 * x)))
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#define DIEPCTL0 (*((volatile uint32_t*)(OTGBASE + 0x900)))
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#define DIEPINT0 (*((volatile uint32_t*)(OTGBASE + 0x908)))
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#define DIEPTSIZ0 (*((volatile uint32_t*)(OTGBASE + 0x910)))
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#define DIEPDMA0 (*((volatile uint32_t*)(OTGBASE + 0x914)))
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#define DIEPCTL1 (*((volatile uint32_t*)(OTGBASE + 0x920)))
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#define DIEPINT1 (*((volatile uint32_t*)(OTGBASE + 0x928)))
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#define DIEPTSIZ1 (*((volatile uint32_t*)(OTGBASE + 0x930)))
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#define DIEPDMA1 (*((volatile uint32_t*)(OTGBASE + 0x934)))
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#define DIEPCTL2 (*((volatile uint32_t*)(OTGBASE + 0x940)))
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#define DIEPINT2 (*((volatile uint32_t*)(OTGBASE + 0x948)))
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#define DIEPTSIZ2 (*((volatile uint32_t*)(OTGBASE + 0x950)))
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#define DIEPDMA2 (*((volatile uint32_t*)(OTGBASE + 0x954)))
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#define DIEPCTL3 (*((volatile uint32_t*)(OTGBASE + 0x960)))
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#define DIEPINT3 (*((volatile uint32_t*)(OTGBASE + 0x968)))
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#define DIEPTSIZ3 (*((volatile uint32_t*)(OTGBASE + 0x970)))
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#define DIEPDMA3 (*((volatile uint32_t*)(OTGBASE + 0x974)))
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#define DIEPCTL4 (*((volatile uint32_t*)(OTGBASE + 0x980)))
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#define DIEPINT4 (*((volatile uint32_t*)(OTGBASE + 0x988)))
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#define DIEPTSIZ4 (*((volatile uint32_t*)(OTGBASE + 0x990)))
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#define DIEPDMA4 (*((volatile uint32_t*)(OTGBASE + 0x994)))
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#define DIEPCTL5 (*((volatile uint32_t*)(OTGBASE + 0x9A0)))
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233 |
#define DIEPINT5 (*((volatile uint32_t*)(OTGBASE + 0x9A8)))
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234 |
#define DIEPTSIZ5 (*((volatile uint32_t*)(OTGBASE + 0x9B0)))
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235 |
#define DIEPDMA5 (*((volatile uint32_t*)(OTGBASE + 0x9B4)))
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236 |
#define DIEPCTL6 (*((volatile uint32_t*)(OTGBASE + 0x9C0)))
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237 |
#define DIEPINT6 (*((volatile uint32_t*)(OTGBASE + 0x9C8)))
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238 |
#define DIEPTSIZ6 (*((volatile uint32_t*)(OTGBASE + 0x9D0)))
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239 |
#define DIEPDMA6 (*((volatile uint32_t*)(OTGBASE + 0x9D4)))
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240 |
#define DIEPCTL7 (*((volatile uint32_t*)(OTGBASE + 0x9E0)))
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241 |
#define DIEPINT7 (*((volatile uint32_t*)(OTGBASE + 0x9E8)))
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242 |
#define DIEPTSIZ7 (*((volatile uint32_t*)(OTGBASE + 0x9F0)))
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243 |
#define DIEPDMA7 (*((volatile uint32_t*)(OTGBASE + 0x9F4)))
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244 |
#define DIEPCTL8 (*((volatile uint32_t*)(OTGBASE + 0xA00)))
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245 |
#define DIEPINT8 (*((volatile uint32_t*)(OTGBASE + 0xA08)))
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246 |
#define DIEPTSIZ8 (*((volatile uint32_t*)(OTGBASE + 0xA10)))
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247 |
#define DIEPDMA8 (*((volatile uint32_t*)(OTGBASE + 0xA14)))
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248 |
#define DIEPCTL9 (*((volatile uint32_t*)(OTGBASE + 0xA20)))
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249 |
#define DIEPINT9 (*((volatile uint32_t*)(OTGBASE + 0xA28)))
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250 |
#define DIEPTSIZ9 (*((volatile uint32_t*)(OTGBASE + 0xA30)))
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251 |
#define DIEPDMA9 (*((volatile uint32_t*)(OTGBASE + 0xA34)))
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252 |
#define DIEPCTL10 (*((volatile uint32_t*)(OTGBASE + 0xA40)))
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253 |
#define DIEPINT10 (*((volatile uint32_t*)(OTGBASE + 0xA48)))
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254 |
#define DIEPTSIZ10 (*((volatile uint32_t*)(OTGBASE + 0xA50)))
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255 |
#define DIEPDMA10 (*((volatile uint32_t*)(OTGBASE + 0xA54)))
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256 |
#define DIEPCTL11 (*((volatile uint32_t*)(OTGBASE + 0xA60)))
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257 |
#define DIEPINT11 (*((volatile uint32_t*)(OTGBASE + 0xA68)))
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258 |
#define DIEPTSIZ11 (*((volatile uint32_t*)(OTGBASE + 0xA70)))
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259 |
#define DIEPDMA11 (*((volatile uint32_t*)(OTGBASE + 0xA74)))
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260 |
#define DIEPCTL12 (*((volatile uint32_t*)(OTGBASE + 0xA80)))
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261 |
#define DIEPINT12 (*((volatile uint32_t*)(OTGBASE + 0xA88)))
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262 |
#define DIEPTSIZ12 (*((volatile uint32_t*)(OTGBASE + 0xA90)))
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263 |
#define DIEPDMA12 (*((volatile uint32_t*)(OTGBASE + 0xA94)))
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264 |
#define DIEPCTL13 (*((volatile uint32_t*)(OTGBASE + 0xAA0)))
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265 |
#define DIEPINT13 (*((volatile uint32_t*)(OTGBASE + 0xAA8)))
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266 |
#define DIEPTSIZ13 (*((volatile uint32_t*)(OTGBASE + 0xAB0)))
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267 |
#define DIEPDMA13 (*((volatile uint32_t*)(OTGBASE + 0xAB4)))
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268 |
#define DIEPCTL14 (*((volatile uint32_t*)(OTGBASE + 0xAC0)))
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269 |
#define DIEPINT14 (*((volatile uint32_t*)(OTGBASE + 0xAC8)))
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270 |
#define DIEPTSIZ14 (*((volatile uint32_t*)(OTGBASE + 0xAD0)))
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271 |
#define DIEPDMA14 (*((volatile uint32_t*)(OTGBASE + 0xAD4)))
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272 |
#define DIEPCTL15 (*((volatile uint32_t*)(OTGBASE + 0xAE0)))
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273 |
#define DIEPINT15 (*((volatile uint32_t*)(OTGBASE + 0xAE8)))
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274 |
#define DIEPTSIZ15 (*((volatile uint32_t*)(OTGBASE + 0xAF0)))
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275 |
#define DIEPDMA15 (*((volatile uint32_t*)(OTGBASE + 0xAF4)))
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276 |
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277 |
/* Device Logical OUT Endpoint-Specific Registers */
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278 |
#define DOEPCTL(x) (*((volatile uint32_t*)(OTGBASE + 0xB00 + 0x20 * x)))
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279 |
#define DOEPINT(x) (*((volatile uint32_t*)(OTGBASE + 0xB08 + 0x20 * x)))
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280 |
#define DOEPTSIZ(x) (*((volatile uint32_t*)(OTGBASE + 0xB10 + 0x20 * x)))
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281 |
#define DOEPDMA(x) (*((volatile uint32_t*)(OTGBASE + 0xB14 + 0x20 * x)))
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282 |
#define DOEPCTL0 (*((volatile uint32_t*)(OTGBASE + 0xB00)))
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283 |
#define DOEPINT0 (*((volatile uint32_t*)(OTGBASE + 0xB08)))
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284 |
#define DOEPTSIZ0 (*((volatile uint32_t*)(OTGBASE + 0xB10)))
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285 |
#define DOEPDMA0 (*((volatile uint32_t*)(OTGBASE + 0xB14)))
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286 |
#define DOEPCTL1 (*((volatile uint32_t*)(OTGBASE + 0xB20)))
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287 |
#define DOEPINT1 (*((volatile uint32_t*)(OTGBASE + 0xB28)))
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288 |
#define DOEPTSIZ1 (*((volatile uint32_t*)(OTGBASE + 0xB30)))
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289 |
#define DOEPDMA1 (*((volatile uint32_t*)(OTGBASE + 0xB34)))
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290 |
#define DOEPCTL2 (*((volatile uint32_t*)(OTGBASE + 0xB40)))
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291 |
#define DOEPINT2 (*((volatile uint32_t*)(OTGBASE + 0xB48)))
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292 |
#define DOEPTSIZ2 (*((volatile uint32_t*)(OTGBASE + 0xB50)))
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293 |
#define DOEPDMA2 (*((volatile uint32_t*)(OTGBASE + 0xB54)))
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294 |
#define DOEPCTL3 (*((volatile uint32_t*)(OTGBASE + 0xB60)))
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295 |
#define DOEPINT3 (*((volatile uint32_t*)(OTGBASE + 0xB68)))
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296 |
#define DOEPTSIZ3 (*((volatile uint32_t*)(OTGBASE + 0xB70)))
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297 |
#define DOEPDMA3 (*((volatile uint32_t*)(OTGBASE + 0xB74)))
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298 |
#define DOEPCTL4 (*((volatile uint32_t*)(OTGBASE + 0xB80)))
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299 |
#define DOEPINT4 (*((volatile uint32_t*)(OTGBASE + 0xB88)))
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300 |
#define DOEPTSIZ4 (*((volatile uint32_t*)(OTGBASE + 0xB90)))
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301 |
#define DOEPDMA4 (*((volatile uint32_t*)(OTGBASE + 0xB94)))
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302 |
#define DOEPCTL5 (*((volatile uint32_t*)(OTGBASE + 0xBA0)))
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303 |
#define DOEPINT5 (*((volatile uint32_t*)(OTGBASE + 0xBA8)))
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304 |
#define DOEPTSIZ5 (*((volatile uint32_t*)(OTGBASE + 0xBB0)))
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305 |
#define DOEPDMA5 (*((volatile uint32_t*)(OTGBASE + 0xBB4)))
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306 |
#define DOEPCTL6 (*((volatile uint32_t*)(OTGBASE + 0xBC0)))
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307 |
#define DOEPINT6 (*((volatile uint32_t*)(OTGBASE + 0xBC8)))
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308 |
#define DOEPTSIZ6 (*((volatile uint32_t*)(OTGBASE + 0xBD0)))
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309 |
#define DOEPDMA6 (*((volatile uint32_t*)(OTGBASE + 0xBD4)))
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310 |
#define DOEPCTL7 (*((volatile uint32_t*)(OTGBASE + 0xBE0)))
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311 |
#define DOEPINT7 (*((volatile uint32_t*)(OTGBASE + 0xBE8)))
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312 |
#define DOEPTSIZ7 (*((volatile uint32_t*)(OTGBASE + 0xBF0)))
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313 |
#define DOEPDMA7 (*((volatile uint32_t*)(OTGBASE + 0xBF4)))
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314 |
#define DOEPCTL8 (*((volatile uint32_t*)(OTGBASE + 0xC00)))
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315 |
#define DOEPINT8 (*((volatile uint32_t*)(OTGBASE + 0xC08)))
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316 |
#define DOEPTSIZ8 (*((volatile uint32_t*)(OTGBASE + 0xC10)))
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317 |
#define DOEPDMA8 (*((volatile uint32_t*)(OTGBASE + 0xC14)))
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318 |
#define DOEPCTL9 (*((volatile uint32_t*)(OTGBASE + 0xC20)))
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319 |
#define DOEPINT9 (*((volatile uint32_t*)(OTGBASE + 0xC28)))
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320 |
#define DOEPTSIZ9 (*((volatile uint32_t*)(OTGBASE + 0xC30)))
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321 |
#define DOEPDMA9 (*((volatile uint32_t*)(OTGBASE + 0xC34)))
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322 |
#define DOEPCTL10 (*((volatile uint32_t*)(OTGBASE + 0xC40)))
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323 |
#define DOEPINT10 (*((volatile uint32_t*)(OTGBASE + 0xC48)))
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324 |
#define DOEPTSIZ10 (*((volatile uint32_t*)(OTGBASE + 0xC50)))
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325 |
#define DOEPDMA10 (*((volatile uint32_t*)(OTGBASE + 0xC54)))
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326 |
#define DOEPCTL11 (*((volatile uint32_t*)(OTGBASE + 0xC60)))
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327 |
#define DOEPINT11 (*((volatile uint32_t*)(OTGBASE + 0xC68)))
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328 |
#define DOEPTSIZ11 (*((volatile uint32_t*)(OTGBASE + 0xC70)))
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329 |
#define DOEPDMA11 (*((volatile uint32_t*)(OTGBASE + 0xC74)))
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330 |
#define DOEPCTL12 (*((volatile uint32_t*)(OTGBASE + 0xC80)))
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331 |
#define DOEPINT12 (*((volatile uint32_t*)(OTGBASE + 0xC88)))
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332 |
#define DOEPTSIZ12 (*((volatile uint32_t*)(OTGBASE + 0xC90)))
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333 |
#define DOEPDMA12 (*((volatile uint32_t*)(OTGBASE + 0xC94)))
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334 |
#define DOEPCTL13 (*((volatile uint32_t*)(OTGBASE + 0xCA0)))
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335 |
#define DOEPINT13 (*((volatile uint32_t*)(OTGBASE + 0xCA8)))
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336 |
#define DOEPTSIZ13 (*((volatile uint32_t*)(OTGBASE + 0xCB0)))
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337 |
#define DOEPDMA13 (*((volatile uint32_t*)(OTGBASE + 0xCB4)))
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338 |
#define DOEPCTL14 (*((volatile uint32_t*)(OTGBASE + 0xCC0)))
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339 |
#define DOEPINT14 (*((volatile uint32_t*)(OTGBASE + 0xCC8)))
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340 |
#define DOEPTSIZ14 (*((volatile uint32_t*)(OTGBASE + 0xCD0)))
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341 |
#define DOEPDMA14 (*((volatile uint32_t*)(OTGBASE + 0xCD4)))
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342 |
#define DOEPCTL15 (*((volatile uint32_t*)(OTGBASE + 0xCE0)))
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343 |
#define DOEPINT15 (*((volatile uint32_t*)(OTGBASE + 0xCE8)))
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344 |
#define DOEPTSIZ15 (*((volatile uint32_t*)(OTGBASE + 0xCF0)))
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345 |
#define DOEPDMA15 (*((volatile uint32_t*)(OTGBASE + 0xCF4)))
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346 |
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347 |
/* Power and Clock Gating Register */
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348 |
#define PCGCCTL (*((volatile uint32_t*)(OTGBASE + 0xE00)))
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349 |
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350 |
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351 |
#endif
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