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//
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//
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//    Copyright 2010 TheSeven
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//
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//
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//    This file is part of emBIOS.
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//
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//    emBIOS is free software: you can redistribute it and/or
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//    modify it under the terms of the GNU General Public License as
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//    published by the Free Software Foundation, either version 2 of the
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//    License, or (at your option) any later version.
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//
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//    emBIOS is distributed in the hope that it will be useful,
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//    but WITHOUT ANY WARRANTY; without even the implied warranty of
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//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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//    See the GNU General Public License for more details.
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//
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//    You should have received a copy of the GNU General Public License along
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//    with emBIOS.  If not, see <http://www.gnu.org/licenses/>.
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//
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//
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#include "global.h"
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#include "mmu.h"
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#include "panic.h"
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#include "usbdrv.h"
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#include "thread.h"
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#include "timer.h"
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#include "usb.h"
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#include "usb_ch9.h"
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#include "synopsysotg.h"
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struct ep_type
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{
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    bool active;
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    bool busy;
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    bool done;
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    int rc;
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    int size;
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    struct wakeup complete;
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} ;
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static struct ep_type endpoints[5];
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static struct usb_ctrlrequest ctrlreq CACHEALIGN_ATTR;
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int usb_drv_port_speed(void)
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{
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    return (DSTS & 2) == 0 ? 1 : 0;
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}
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void reset_endpoints(int reinit)
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{
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    unsigned int i;
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    for (i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
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    {
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        if (reinit) endpoints[i].active = false;
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        endpoints[i].busy = false;
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        endpoints[i].rc = -1;
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        endpoints[i].done = true;
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        wakeup_signal(&endpoints[i].complete);
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    }
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    DIEPCTL0 = 0x8800;  /* EP0 IN ACTIVE NEXT=1 */
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    DOEPCTL0 = 0x8000;  /* EP0 OUT ACTIVE */
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    DOEPTSIZ0 = 0x20080040;  /* EP0 OUT Transfer Size:
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                                64 Bytes, 1 Packet, 1 Setup Packet */
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    DOEPDMA0 = (uint32_t)&ctrlreq;
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    DOEPCTL0 |= 0x84000000;  /* EP0 OUT ENABLE CLEARNAK */
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    if (reinit)
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    {
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        /* The size is getting set to zero, because we don't know
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           whether we are Full Speed or High Speed at this stage */
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        /* EP1 IN INACTIVE DATA0 SIZE=0 NEXT=3 */
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        DIEPCTL1 = 0x10001800;
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        /* EP2 OUT INACTIVE DATA0 SIZE=0 */
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        DOEPCTL2 = 0x10000000;
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        /* EP3 IN INACTIVE DATA0 SIZE=0 NEXT=0 */
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        DIEPCTL3 = 0x10000000;
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        /* EP4 OUT INACTIVE DATA0 SIZE=0 */
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        DOEPCTL4 = 0x10000000;
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    }
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    else
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    {
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        /* INACTIVE DATA0 */
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        DIEPCTL1 = (DIEPCTL1 & ~0x00008000) | 0x10000000;
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        DOEPCTL2 = (DOEPCTL2 & ~0x00008000) | 0x10000000;
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        DIEPCTL3 = (DIEPCTL3 & ~0x00008000) | 0x10000000;
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        DOEPCTL4 = (DOEPCTL4 & ~0x00008000) | 0x10000000;
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    }
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    DAINTMSK = 0xFFFFFFFF;  /* Enable interrupts on all EPs */
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}
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94
int usb_drv_request_endpoint(int type, int dir)
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{
96
    size_t ep;
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    int ret = -1;
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99
    if (dir == USB_DIR_IN) ep = 1;
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    else ep = 2;
101
 
102
    while (ep < 5)
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    {
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        if (!endpoints[ep].active)
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        {
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            endpoints[ep].active = true;
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            ret = ep | dir;
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            uint32_t newbits = (type << 18) | 0x10000000;
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            if (dir) DIEPCTL(ep) = (DIEPCTL(ep) & ~0x000C0000) | newbits;
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            else DOEPCTL(ep) = (DOEPCTL(ep) & ~0x000C0000) | newbits;
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            break;
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        }
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        ep += 2;
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    }
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116
    return ret;
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}
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119
void usb_drv_release_endpoint(int ep)
120
{
121
    ep = ep & 0x7f;
122
 
123
    if (ep < 1 || ep > USB_NUM_ENDPOINTS) return;
124
 
125
    endpoints[ep].active = false;
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}
127
 
128
static void usb_reset(void)
129
{
130
    volatile int i;
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132
    DCTL = 0x802;  /* Soft Disconnect */
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    OPHYPWR = 0;  /* PHY: Power up */
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    OPHYUNK1 = 0xFFFFFFFF;
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    OPHYUNK2 = 0xE3F;
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    OPHYCLK = 0;  /* PHY: 48MHz clock */
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    ORSTCON = 1;  /* PHY: Assert Software Reset */
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    udelay(10);
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    ORSTCON = 0;  /* PHY: Deassert Software Reset */
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    GRSTCTL = 1;  /* OTG: Assert Software Reset */
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    while (GRSTCTL & 1);  /* Wait for OTG to ack reset */
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    while (!(GRSTCTL & 0x80000000));  /* Wait for OTG AHB master idle */
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    GRXFSIZ = 0x00000200;  /* RX FIFO: 512 bytes */
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    GNPTXFSIZ = 0x02000200;  /* Non-periodic TX FIFO: 512 bytes */
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    GAHBCFG = 0x27;  /* OTG AHB config: Unmask ints, burst length 4, DMA on */
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    GUSBCFG = 0x1408;  /* OTG: 16bit PHY and some reserved bits */
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    DCFG = 4;  /* Address 0 */
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    DCTL = 0x800;  /* Soft Reconnect */
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    DIEPMSK = 0x0D;  /* IN EP interrupt mask */
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    DOEPMSK = 0x0D;  /* IN EP interrupt mask */
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    DAINTMSK = 0xFFFFFFFF;  /* Enable interrupts on all endpoints */
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    GINTMSK = 0xC3000;  /* Interrupt mask: IN event, OUT event, bus reset */
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158
    reset_endpoints(1);
159
}
160
 
161
/* IRQ handler */
162
void INT_USB_FUNC(void)
163
{
164
    int i;
165
    uint32_t ints = GINTSTS;
166
    uint32_t epints;
167
    if (ints & 0x1000)  /* bus reset */
168
    {
169
        DCFG = 4;  /* Address 0 */
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        reset_endpoints(1);
171
        usb_handle_bus_reset();
172
    }
173
 
174
    if (ints & 0x2000)  /* enumeration done, we now know the speed */
175
    {
176
        /* Set up the maximum packet sizes accordingly */
177
        uint32_t maxpacket = usb_drv_port_speed() ? 512 : 64;
178
        DIEPCTL1 = (DIEPCTL1 & ~0x000003FF) | maxpacket;
179
        DOEPCTL2 = (DOEPCTL2 & ~0x000003FF) | maxpacket;
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        DIEPCTL3 = (DIEPCTL3 & ~0x000003FF) | maxpacket;
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        DOEPCTL4 = (DOEPCTL4 & ~0x000003FF) | maxpacket;
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    }
183
 
184
    if (ints & 0x40000)  /* IN EP event */
185
        for (i = 0; i < 4; i += i + 1)  // 0, 1, 3
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            if (epints = DIEPINT(i))
187
            {
188
                if (epints & 1)  /* Transfer completed */
189
                {
190
                    invalidate_dcache();
191
                    int bytes = endpoints[i].size - (DIEPTSIZ(i) & 0x3FFFF);
192
                    if (endpoints[i].busy)
193
                    {
194
                        endpoints[i].busy = false;
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                        endpoints[i].rc = 0;
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                        endpoints[i].done = true;
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                        usb_handle_transfer_complete(i, USB_DIR_IN, 0, bytes);
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                        wakeup_signal(&endpoints[i].complete);
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                    }
200
                }
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                if (epints & 4)  /* AHB error */
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                    panicf(PANIC_FATAL, "USB: AHB error on IN EP%d", i);
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                if (epints & 8)  /* Timeout */
204
                {
205
                    if (endpoints[i].busy)
206
                    {
207
                        endpoints[i].busy = false;
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                        endpoints[i].rc = 1;
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                        endpoints[i].done = true;
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                        wakeup_signal(&endpoints[i].complete);
211
                    }
212
                }
213
                DIEPINT(i) = epints;
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            }
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216
    if (ints & 0x80000)  /* OUT EP event */
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        for (i = 0; i < 5; i += 2)  // 0, 2, 4
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            if (epints = DOEPINT(i))
219
            {
220
                if (epints & 1)  /* Transfer completed */
221
                {
222
                    invalidate_dcache();
223
                    int bytes = endpoints[i].size - (DOEPTSIZ(i) & 0x3FFFF);
224
                    if (endpoints[i].busy)
225
                    {
226
                        endpoints[i].busy = false;
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                        endpoints[i].rc = 0;
228
                        endpoints[i].done = true;
229
                        usb_handle_transfer_complete(i, USB_DIR_OUT, 0, bytes);
230
                        wakeup_signal(&endpoints[i].complete);
231
                    }
232
                }
233
                if (epints & 4)  /* AHB error */
234
                    panicf(PANIC_FATAL, "USB: AHB error on OUT EP%d", i);
235
                if (epints & 8)  /* SETUP phase done */
236
                {
237
                    invalidate_dcache();
238
                    if (i == 0) usb_handle_control_request(&ctrlreq);
239
                    else panicf(PANIC_FATAL, "USB: SETUP done on OUT EP%d!?", i);
240
                }
241
                /* Make sure EP0 OUT is set up to accept the next request */
242
                if (!i)
243
                {
244
                    DOEPTSIZ0 = 0x20080040;
245
                    DOEPDMA0 = (uint32_t)&ctrlreq;
246
                    DOEPCTL0 |= 0x84000000;
247
                }
248
                DOEPINT(i) = epints;
249
            }
250
 
251
    GINTSTS = ints;
252
}
253
 
254
void usb_drv_set_address(int address)
255
{
256
    DCFG = (DCFG & ~0x7F0) | (address << 4);
257
}
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259
void ep_send(int ep, const void *ptr, int length)
260
{
261
    endpoints[ep].busy = true;
262
    endpoints[ep].size = length;
263
    DIEPCTL(ep) |= 0x8000;  /* EPx OUT ACTIVE */
264
    int blocksize = usb_drv_port_speed() ? 512 : 64;
265
    int packets = (length + blocksize - 1) / blocksize;
266
    if (!length)
267
    {
268
        DIEPTSIZ(ep) = 1 << 19;  /* one empty packet */
269
        DIEPDMA(ep) = 0x10000000;  /* dummy address */
270
    }
271
    else
272
    {
273
        DIEPTSIZ(ep) = length | (packets << 19);
274
        DIEPDMA(ep) = (uint32_t)ptr;
275
//        if (length > 64) panicf(PANIC_FATAL, "%08X %08X %08X\n%08X %08X %08X", ptr, length | (packets << 19), DIEPCTL(ep), DIEPDMA(ep), DIEPTSIZ(ep), DIEPINT(ep));
276
    }
277
    clean_dcache();
278
    DIEPCTL(ep) |= 0x84000000;  /* EPx OUT ENABLE CLEARNAK */
279
}
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281
void ep_recv(int ep, void *ptr, int length)
282
{
283
    endpoints[ep].busy = true;
284
    endpoints[ep].size = length;
285
    DOEPCTL(ep) &= ~0x20000;  /* EPx UNSTALL */
286
    DOEPCTL(ep) |= 0x8000;  /* EPx OUT ACTIVE */
287
    int blocksize = usb_drv_port_speed() ? 512 : 64;
288
    int packets = (length + blocksize - 1) / blocksize;
289
    if (!length)
290
    {
291
        DOEPTSIZ(ep) = 1 << 19;  /* one empty packet */
292
        DOEPDMA(ep) = 0x10000000;  /* dummy address */
293
    }
294
    else
295
    {
296
        DOEPTSIZ(ep) = length | (packets << 19);
297
        DOEPDMA(ep) = (uint32_t)ptr;
298
    }
299
    clean_dcache();
300
    DOEPCTL(ep) |= 0x84000000;  /* EPx OUT ENABLE CLEARNAK */
301
}
302
 
303
int usb_drv_send(int endpoint, const void *ptr, int length)
304
{
305
    endpoint &= 0x7f;
306
    endpoints[endpoint].done = false;
307
    ep_send(endpoint, ptr, length);
308
    while (!endpoints[endpoint].done && endpoints[endpoint].busy)
309
        wakeup_wait(&endpoints[endpoint].complete, TIMEOUT_BLOCK);
310
    return endpoints[endpoint].rc;
311
}
312
 
313
int usb_drv_send_nonblocking(int endpoint, const void *ptr, int length)
314
{
315
    ep_send(endpoint & 0x7f, ptr, length);
316
    return 0;
317
}
318
 
319
int usb_drv_recv(int endpoint, void* ptr, int length)
320
{
321
    ep_recv(endpoint & 0x7f, ptr, length);
322
    return 0;
323
}
324
 
325
void usb_drv_cancel_all_transfers(void)
326
{
327
    uint32_t mode = enter_critical_section();
328
    reset_endpoints(0);
329
    leave_critical_section(mode);
330
}
331
 
332
bool usb_drv_stalled(int endpoint, bool in)
333
{
334
    if (in) return DIEPCTL(endpoint) & 0x00200000 ? true : false;
335
    else return DOEPCTL(endpoint) & 0x00200000 ? true : false;
336
}
337
 
338
void usb_drv_stall(int endpoint, bool stall, bool in)
339
{
340
    if (in)
341
    {
342
        if (stall) DIEPCTL(endpoint) |= 0x00200000;
343
        else DIEPCTL(endpoint) &= ~0x00200000;
344
    }
345
    else
346
    {
347
        if (stall) DOEPCTL(endpoint) |= 0x00200000;
348
        else DOEPCTL(endpoint) &= ~0x00200000;
349
    }
350
}
351
 
352
void usb_drv_init(void)
353
{
354
    unsigned int i;
355
    for (i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
356
        wakeup_init(&endpoints[i].complete);
357
 
358
    /* Enable USB clock */
359
    PWRCON &= ~0x4000;
360
    PWRCONEXT &= ~0x800;
361
    PCGCCTL = 0;
362
 
363
    /* unmask irq */
364
    INTMSK |= INTMSK_USB_OTG;
365
 
366
    /* reset the beast */
367
    usb_reset();
368
}