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@    Copyright 2010 TheSeven
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@    This file is part of emBIOS.
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@
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@    emBIOS is free software: you can redistribute it and/or
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@    modify it under the terms of the GNU General Public License as
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@    published by the Free Software Foundation, either version 2 of the
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@    License, or (at your option) any later version.
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@
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@    emBIOS is distributed in the hope that it will be useful,
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@    but WITHOUT ANY WARRANTY; without even the implied warranty of
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@    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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@    See the GNU General Public License for more details.
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@
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@    You should have received a copy of the GNU General Public License
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@    along with emBIOS.  If not, see <http://www.gnu.org/licenses/>.
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@
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@
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.section .intvect,"ax",%progbits
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	ldr pc, =reset_handler
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	ldr pc, =undef_instr_handler
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	ldr pc, =syscall_handler
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	ldr pc, =prefetch_abort_handler
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	ldr pc, =data_abort_handler
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	ldr pc, =reserved_handler
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	ldr pc, =irq_handler
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	ldr pc, =fiq_handler
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.ltorg
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.section .initcode,"ax",%progbits
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.global _start
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_start:
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	ldr	r0, =_sramsource
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	ldr	r1, =_sramstart
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	ldr	r2, =_sramend
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.copysram:
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	cmp	r2, r1
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	ldrhi	r3, [r0], #4
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	strhi	r3, [r1], #4
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	bhi	.copysram
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	ldr	r0, =_sdramsource
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	ldr	r1, =_sdramstart
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	ldr	r2, =_sdramend
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.copysdram:
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	cmp	r2, r1
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	ldrhi	r3, [r0], #4
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	strhi	r3, [r1], #4
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	bhi	.copysdram
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	ldr	r0, =_initbssstart
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	ldr	r1, =_initbssend
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	mov	r2, #0
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.clearinitbss:
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	cmp	r1, r0
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	strhi	r2, [r0], #4
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	bhi	.clearinitbss
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	ldr	r0, =_ibssstart
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	ldr	r1, =_ibssend
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.clearibss:
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	cmp	r1, r0
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	strhi	r2, [r0], #4
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	bhi	.clearibss
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	ldr	r0, =_bssstart
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	ldr	r1, =_bssend
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.clearbss:
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	cmp	r1, r0
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	strhi	r2, [r0], #4
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	bhi	.clearbss
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	ldr	r1, =0x38200000
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	ldr	r0, [r1]
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	orr	r0, r0, #1
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	bic	r0, r0, #0x10000
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	str	r0, [r1]
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	mov	r0, #0
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	mcr	p15, 0, r0,c7,c5,0
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	msr	cpsr_c, #0xd2
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	ldr	sp, =_irqstackend
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	msr	cpsr_c, #0xd7
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	ldr	sp, =_abortstackend
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	msr	cpsr_c, #0xdb
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	ldr	sp, =_abortstackend
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	msr	cpsr_c, #0xd3
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	ldr	sp, =_initstackend
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	bl	init
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	b	main
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.ltorg
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.section .icode, "ax", %progbits
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.align 2
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.global reset
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.global hang
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.type reset, %function
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.type hang, %function
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reset:
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	msr	cpsr_c, #0xd3
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	mov	r0, #0x110000
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	add	r0, r0, #0xff
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	add	r1, r0, #0xa00
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	mov	r2, #0x3c800000
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	str	r1, [r2]
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	mov	r1, #0xff0
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	str	r1, [r2,#4]
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	str	r0, [r2]
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hang:
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	b	hang
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.size reset, .-reset
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.size hang, .-hang
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.type reset_handler, %function
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reset_handler:
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	adr	r0, reset_text
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	b	panic
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reset_text:
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	.ascii	"Hit reset vector!\0"
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.size reset_handler, .-reset_handler
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.type undef_instr_handler, %function
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undef_instr_handler:
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	adr	r0, undef_instr_text
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	sub	r0, lr, #4
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	b	panicf
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.size undef_instr_handler, .-undef_instr_handler
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.type prefetch_abort_handler, %function
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prefetch_abort_handler:
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	adr	r0, prefetch_abort_text
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	sub	r0, lr, #4
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	b	panicf
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.size prefetch_abort_handler, .-prefetch_abort_handler
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.type data_abort_handler, %function
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data_abort_handler:
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	adr	r0, data_abort_text
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	sub	r0, lr, #4
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	b	panicf
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.size data_abort_handler, .-data_abort_handler
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.type reserved_handler, %function
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reserved_handler:
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	adr	r0, reserved_text
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	b	panic
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.size reserved_handler, .-reserved_handler
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.type fiq_handler, %function
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fiq_handler:
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	adr	r0, fiq_text
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	b	panic
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.size fiq_handler, .-fiq_handler
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.type irq_handler, %function
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irq_handler:
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	adr	r0, irq_text
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	b	panic
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.size irq_handler, .-irq_handler
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.type syscall_handler, %function
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syscall_handler:
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	adr	r0, syscall_text
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	b	panic
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.size syscall_handler, .-syscall_handler
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undef_instr_text:
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	.ascii	"Undefined instruction at %08X!\0"
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prefetch_abort_text:
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	.ascii	"Prefetch abort at %08X!\0"
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data_abort_text:
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	.ascii	"Data abort at %08X!\0"
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reserved_text:
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	.ascii	"Hit reserved exception handler!\0"
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fiq_text:
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	.ascii	"Unhandled FIQ!\0"
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irq_text:
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	.ascii	"Unhandled IRQ!\0"
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syscall_text:
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	.ascii	"Unhandled syscall!\0"