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301 theseven 1
/***************************************************************************
2
 *             __________               __   ___.
3
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
4
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
5
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
6
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
7
 *                     \/            \/     \/    \/            \/
8
 * $Id$
9
 *
10
 * Copyright (C) 2007 Dave Chapman
11
 *
12
 * This program is free software; you can redistribute it and/or
13
 * modify it under the terms of the GNU General Public License
14
 * as published by the Free Software Foundation; either version 2
15
 * of the License, or (at your option) any later version.
16
 *
17
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18
 * KIND, either express or implied.
19
 *
20
 ****************************************************************************/
21
#include "global.h"
22
#include "thread.h"
23
#include "disk.h"
24
#include "storage.h"
25
#include "timer.h"
26
#include "../ipodnano3g/s5l8702.h"
27
 
28
/** static, private data **/ 
29
uint16_t ata_identify_data[0x100];
30
bool ata_lba48;
31
bool ata_dma;
32
uint64_t ata_total_sectors;
33
static struct mutex ata_mutex;
34
static struct wakeup ata_wakeup;
35
static uint32_t ata_dma_flags;
36
static long ata_last_activity_value = -1;
37
static long ata_sleep_timeout = 20000000;
38
static uint32_t ata_stack[0x80];
39
static bool ata_powered;
40
 
328 theseven 41
#ifdef ATA_HAVE_BBT
42
#include "panic.h"
43
uint16_t ata_bbt[ATA_BBT_PAGES][0x20];
44
uint32_t ata_virtual_sectors;
301 theseven 45
 
328 theseven 46
int ata_rw_sectors_internal(uint64_t sector, uint32_t count, void* buffer, bool write);
47
 
48
void ata_bbt_read_sectors(uint32_t sector, uint32_t count, void* buffer)
49
{
50
    int rc = ata_rw_sectors_internal(sector, count, buffer, false);
51
    if (IS_ERR(rc))
52
        panicf(PANIC_KILLTHREAD, "ATA: Error %08X while reading BBT (sector %d, count %d)\n",
53
               rc, sector, count);
54
}
55
#endif
56
 
57
 
301 theseven 58
static uint16_t ata_read_cbr(uint32_t volatile* reg)
59
{
317 theseven 60
    while (!(ATA_PIO_READY & 2)) yield();
301 theseven 61
    volatile uint32_t dummy = *reg;
317 theseven 62
    while (!(ATA_PIO_READY & 1)) yield();
301 theseven 63
    return ATA_PIO_RDATA;
64
}
65
 
66
static void ata_write_cbr(uint32_t volatile* reg, uint16_t data)
67
{
317 theseven 68
    while (!(ATA_PIO_READY & 2)) yield();
301 theseven 69
    *reg = data;
70
}
71
 
72
static int ata_wait_for_not_bsy(long timeout)
73
{
74
    long startusec = USEC_TIMER;
75
    while (true)
76
    {
77
        uint8_t csd = ata_read_cbr(&ATA_PIO_CSD);
78
        if (!(csd & BIT(7))) return 0;
79
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(0);
80
    }
81
}
82
 
83
static int ata_wait_for_rdy(long timeout)
84
{
85
    long startusec = USEC_TIMER;
86
    PASS_RC(ata_wait_for_not_bsy(timeout), 1, 0);
87
    while (true)
88
    {
89
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
90
        if (dad & BIT(6)) return 0;
91
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(1);
92
    }
93
}
94
 
95
static int ata_wait_for_start_of_transfer(long timeout)
96
{
97
    long startusec = USEC_TIMER;
98
    PASS_RC(ata_wait_for_not_bsy(timeout), 2, 0);
99
    while (true)
100
    {
101
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
102
        if (dad & BIT(0)) RET_ERR(1);
103
        if ((dad & (BIT(7) | BIT(3))) == BIT(3)) return 0;
104
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(2);
105
    }
106
}
107
 
108
static int ata_wait_for_end_of_transfer(long timeout)
109
{
110
    PASS_RC(ata_wait_for_not_bsy(timeout), 2, 0);
111
    uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
112
    if (dad & BIT(0)) RET_ERR(1);
113
    if ((dad & (BIT(3) | BITRANGE(5, 7))) == BIT(6)) return 0;
114
    RET_ERR(2);
115
}    
116
 
117
int ata_identify(uint16_t* buf)
118
{
119
    int i;
120
    PASS_RC(ata_wait_for_not_bsy(10000000), 1, 0);
121
    ata_write_cbr(&ATA_PIO_DVR, 0);
122
    ata_write_cbr(&ATA_PIO_CSD, 0xec);
123
    PASS_RC(ata_wait_for_start_of_transfer(10000000), 1, 1);
124
    for (i = 0; i < 0x100; i++)
125
    {
126
        uint16_t word = ata_read_cbr(&ATA_PIO_DTR);
127
        buf[i] = (word >> 8) | (word << 8);
128
    }
129
}
130
 
131
void ata_set_active(void)
132
{
133
    ata_last_activity_value = USEC_TIMER;
134
}
135
 
317 theseven 136
int ata_set_feature(uint32_t feature, uint32_t param)
137
{
138
    PASS_RC(ata_wait_for_rdy(500000), 1, 0);
139
    ata_write_cbr(&ATA_PIO_DVR, 0);
140
    ata_write_cbr(&ATA_PIO_FED, 3);
141
    ata_write_cbr(&ATA_PIO_SCR, param);
142
    ata_write_cbr(&ATA_PIO_CSD, feature);
143
    PASS_RC(ata_wait_for_rdy(500000), 1, 1);
144
    return 0;
145
}
146
 
301 theseven 147
int ata_power_up()
148
{
149
    ata_set_active();
150
    i2c_sendbyte(0, 0xe6, 0x1b, 1);
151
    clockgate_enable(5, true);
152
    ATA_CFG = BIT(0);
153
    sleep(1000);
154
    ATA_CFG = 0;
155
    sleep(6000);
156
    ATA_SWRST = BIT(0);
157
    sleep(500);
158
    ATA_SWRST = 0;
159
    sleep(90000);
160
    ATA_CONTROL = BIT(0);
161
    sleep(200000);
162
    ATA_PIO_TIME = 0x191f7;
163
    ATA_PIO_LHR = 0;
164
    while (!(ATA_PIO_READY & BIT(1))) sleep(100);
165
    PASS_RC(ata_identify(ata_identify_data), 2, 0);
166
    uint32_t piotime = 0x11f3;
167
    uint32_t mdmatime = 0x1c175;
168
    uint32_t udmatime = 0x5071152;
169
    uint32_t param = 0;
170
    ata_dma_flags = 0;
171
    ata_lba48 = ata_identify_data[83] & BIT(10) ? true : false;
172
    if (ata_lba48)
173
        ata_total_sectors = ata_identify_data[100]
174
                          | (((uint64_t)ata_identify_data[101]) << 16)
175
                          | (((uint64_t)ata_identify_data[102]) << 32)
176
                          | (((uint64_t)ata_identify_data[103]) << 48);
177
    else ata_total_sectors = ata_identify_data[60] | (((uint32_t)ata_identify_data[61]) << 16);
328 theseven 178
    ata_total_sectors >>= 3;
301 theseven 179
    if (ata_identify_data[53] & BIT(1))
180
    {
181
        if (ata_identify_data[64] & BIT(1)) piotime = 0x2072;
182
        else if (ata_identify_data[64] & BIT(0)) piotime = 0x7083;
183
    }
184
    if (ata_identify_data[63] & BIT(2))
185
    {
186
        mdmatime = 0x5072;
187
        param = 0x22;
188
    }
189
    else if (ata_identify_data[63] & BIT(1))
190
    {
191
        mdmatime = 0x7083;
192
        param = 0x21;
193
    }
194
    if (ata_identify_data[63] & BITRANGE(0, 2))
195
    {
196
        ata_dma_flags = BIT(3) | BIT(10);
197
        param |= 0x20;
198
    }
199
    if (ata_identify_data[53] & BIT(2))
200
    {
201
        if (ata_identify_data[88] & BIT(4))
202
        {
203
            udmatime = 0x2010a52;
204
            param = 0x44;
205
        }
206
        else if (ata_identify_data[88] & BIT(3))
207
        {
208
            udmatime = 0x2020a52;
209
            param = 0x43;
210
        }
211
        else if (ata_identify_data[88] & BIT(2))
212
        {
213
            udmatime = 0x3030a52;
214
            param = 0x42;
215
        }
216
        else if (ata_identify_data[88] & BIT(1))
217
        {
218
            udmatime = 0x3050a52;
219
            param = 0x41;
220
        }
221
        if (ata_identify_data[88] & BITRANGE(0, 4))
222
        {
223
            ata_dma_flags = BIT(2) | BIT(3) | BIT(9) | BIT(10);
224
            param |= 0x40;
225
        }
226
    }
227
    ata_dma = param ? true : false;
317 theseven 228
    PASS_RC(ata_set_feature(0xef, param), 2, 1);
328 theseven 229
    if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(0x82, 0), 2, 2);
230
    if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0xaa, 0), 2, 3);
301 theseven 231
    ATA_PIO_TIME = piotime;
232
    ATA_MDMA_TIME = mdmatime;
233
    ATA_UDMA_TIME = udmatime;
234
    ata_powered = true;
235
    ata_set_active();
236
    return 0;
237
}
238
 
239
void ata_power_down()
240
{
241
    ata_powered = false;
242
    ata_wait_for_rdy(1000000);
243
    ata_write_cbr(&ATA_PIO_DVR, 0);
244
    ata_write_cbr(&ATA_PIO_CSD, 0xe0);
245
    ata_wait_for_rdy(1000000);
246
    sleep(30000);
247
    ATA_CONTROL = 0;
317 theseven 248
    while (!(ATA_CONTROL & BIT(1))) yield();
301 theseven 249
    clockgate_enable(5, false);
250
    i2c_sendbyte(0, 0xe6, 0x1b, 0);
251
}
252
 
253
int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool write)
254
{
328 theseven 255
#ifdef ATA_HAVE_BBT
256
    if (sector + count > ata_virtual_sectors) RET_ERR(0);
257
    while (count)
258
    {
259
        uint32_t l0idx = sector >> 15;
260
        uint32_t l0offs = sector & 0x7fff;
261
        uint32_t cnt = MIN(count, 0x8000 - l0offs);
262
        uint32_t l0data = ata_bbt[0][l0idx << 1];
263
        uint32_t base = ata_bbt[0][(l0idx << 1) | 1] << 12;
264
        uint32_t phys;
265
        if (l0data < 0x8000) phys = sector + l0data + base;
266
        else
267
        {
268
            uint32_t l1idx = (sector >> 10) & 0x1f;
269
            uint32_t l1offs = sector & 0x3ff;
270
            cnt = MIN(count, 0x400 - l1offs);
271
            uint32_t l1data = ata_bbt[l0data & 0x7fff][l1idx];
272
            if (l1data < 0x8000) phys = sector + l1data + base;
273
            else
274
            {
275
                uint32_t l2idx = (sector >> 5) & 0x1f;
276
                uint32_t l2offs = sector & 0x1f;
277
                cnt = MIN(count, 0x20 - l2offs);
278
                uint32_t l2data = ata_bbt[l1data & 0x7fff][l2idx];
279
                if (l2data < 0x8000) phys = sector + l2data + base;
280
                else
281
                {
282
                    uint32_t l3idx = sector & 0x1f;
283
                    phys = ata_bbt[l2data & 0x7fff][l3idx];
284
                    for (cnt = 1; cnt < count && l3idx + cnt < 0x20; cnt++)
285
                        if (ata_bbt[l2data & 0x7fff][l3idx + cnt] != phys)
286
                            break;
287
                    phys += sector + base;
288
                }
289
            }
290
        }
291
        PASS_RC(ata_rw_sectors_internal(phys, cnt, buffer, write), 0, 0);
292
        buffer += cnt * SECTOR_SIZE;
293
        sector += cnt;
294
        count -= cnt;
295
    }
296
    return 0;
297
}
298
 
299
int ata_rw_sectors_internal(uint64_t sector, uint32_t count, void* buffer, bool write)
300
{
301
#endif
301 theseven 302
    if (sector + count > ata_total_sectors) RET_ERR(0);
303
    if (!ata_powered) ata_power_up();
304
    ata_set_active();
305
    if (ata_dma && write) clean_dcache();
306
    else if (ata_dma) invalidate_dcache();
307
    ATA_COMMAND = BIT(1);
308
    while (count)
309
    {
317 theseven 310
        uint32_t cnt = MIN(ata_lba48 ? 8192 : 32, count);
328 theseven 311
        PASS_RC(ata_wait_for_rdy(100000), 2, 1);
301 theseven 312
        ata_write_cbr(&ATA_PIO_DVR, 0);
313
        if (ata_lba48)
314
        {
315
            ata_write_cbr(&ATA_PIO_SCR, cnt >> 5);
316
            ata_write_cbr(&ATA_PIO_SCR, (cnt << 3) & 0xff);
317
            ata_write_cbr(&ATA_PIO_LHR, (sector >> 37) & 0xff);
318
            ata_write_cbr(&ATA_PIO_LMR, (sector >> 29) & 0xff);
319
            ata_write_cbr(&ATA_PIO_LLR, (sector >> 21) & 0xff);
320
            ata_write_cbr(&ATA_PIO_LHR, (sector >> 13) & 0xff);
321
            ata_write_cbr(&ATA_PIO_LMR, (sector >> 5) & 0xff);
322
            ata_write_cbr(&ATA_PIO_LLR, (sector << 3) & 0xff);
323
            ata_write_cbr(&ATA_PIO_DVR, BIT(6));
324
            if (write) ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0x35 : 0x39);
325
            else ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0x25 : 0x29);
326
        }
327
        else
328
        {
329
            ata_write_cbr(&ATA_PIO_SCR, (cnt << 3) & 0xff);
330
            ata_write_cbr(&ATA_PIO_LHR, (sector >> 13) & 0xff);
331
            ata_write_cbr(&ATA_PIO_LMR, (sector >> 5) & 0xff);
332
            ata_write_cbr(&ATA_PIO_LLR, (sector << 3) & 0xff);
333
            ata_write_cbr(&ATA_PIO_DVR, BIT(6) | ((sector >> 21) & 0xf));
334
            if (write) ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0xca : 0x30);
335
            else ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0xc8 : 0xc4);
336
        }
337
        sector += cnt;
338
        count -= cnt;
339
        if (ata_dma)
340
        {
328 theseven 341
            PASS_RC(ata_wait_for_start_of_transfer(1500000), 2, 2);
301 theseven 342
            if (write)
343
            {
344
                ATA_SBUF_START = buffer;
345
                ATA_SBUF_SIZE = SECTOR_SIZE * cnt;
346
                ATA_CFG |= BIT(4);
347
            }
348
            else
349
            {
350
                ATA_TBUF_START = buffer;
351
                ATA_TBUF_SIZE = SECTOR_SIZE * cnt;
352
                ATA_CFG &= ~BIT(4);
353
            }
354
            ATA_XFR_NUM = SECTOR_SIZE * cnt - 1;
355
            ATA_CFG |= ata_dma_flags;
356
            ATA_CFG &= ~(BIT(7) | BIT(8));
357
            wakeup_wait(&ata_wakeup, TIMEOUT_NONE);
358
            ATA_IRQ = BITRANGE(0, 4);
359
            ATA_IRQ_MASK = BIT(0);
360
            ATA_COMMAND = BIT(0);
328 theseven 361
            if (wakeup_wait(&ata_wakeup, 1500000) == THREAD_TIMEOUT)
301 theseven 362
            {
363
                ATA_COMMAND = BIT(1);
364
                ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12));
328 theseven 365
                RET_ERR(3);
301 theseven 366
            }
367
            ATA_COMMAND = BIT(1);
368
            ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12));
369
            buffer += SECTOR_SIZE * cnt;
370
        }
371
        else
372
        {
373
            cnt *= SECTOR_SIZE / 512;
374
            while (cnt--)
375
            {
376
                int i;
328 theseven 377
                PASS_RC(ata_wait_for_start_of_transfer(1500000), 2, 2);
301 theseven 378
                if (write)
379
                    for (i = 0; i < 256; i++)
380
                        ata_write_cbr(&ATA_PIO_DTR, ((uint16_t*)buffer)[i]);
381
                else
382
                    for (i = 0; i < 256; i++)
383
                        ((uint16_t*)buffer)[i] = ata_read_cbr(&ATA_PIO_DTR);
384
                buffer += 512;
385
            }
386
        }
387
        PASS_RC(ata_wait_for_end_of_transfer(100000), 2, 3);
388
    }
389
    ata_set_active();
390
    return 0;
391
}
392
 
393
static void ata_thread(void)
394
{
395
    while (true)
396
    {
397
        mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
398
        if (TIME_AFTER(USEC_TIMER, ata_last_activity_value + ata_sleep_timeout) && ata_powered)
399
            ata_power_down();
400
        mutex_unlock(&ata_mutex);
401
        sleep(1000000);
402
    }
403
}
404
 
405
/* API Functions */
406
int ata_soft_reset()
407
{
408
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
409
    if (!ata_powered) ata_power_up();
410
    ata_set_active();
411
    ata_write_cbr(&ATA_PIO_DAD, BIT(1) | BIT(2));
412
    sleep(10);
413
    ata_write_cbr(&ATA_PIO_DAD, 0);
414
    PASS_RC_MTX(ata_wait_for_rdy(5000000), 0, 0, &ata_mutex);
415
    ata_set_active();
416
    mutex_unlock(&ata_mutex);
417
}
418
 
419
int ata_read_sectors(IF_MD2(int drive,) unsigned long start, int incount,
420
                     void* inbuf)
421
{
422
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
328 theseven 423
    int tries = 1;
301 theseven 424
    int rc = -1;
328 theseven 425
    while (tries-- && rc)
301 theseven 426
    {
427
        rc = ata_rw_sectors(start, incount, inbuf, false);
428
        if (rc) ata_soft_reset();
429
    }
430
    mutex_unlock(&ata_mutex);
431
    return rc;
432
}
433
 
434
int ata_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
435
                      const void* outbuf)
436
{
437
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
328 theseven 438
    int tries = 1;
301 theseven 439
    int rc = -1;
328 theseven 440
    while (tries-- && rc)
301 theseven 441
    {
442
        rc = ata_rw_sectors(start, count, (void*)((uint32_t)outbuf), true);
443
        if (rc) ata_soft_reset();
444
    }
445
    mutex_unlock(&ata_mutex);
446
    return rc;
447
}
448
 
449
void ata_spindown(int seconds)
450
{
451
    ata_sleep_timeout = seconds * 1000000;
452
}
453
 
454
void ata_sleep(void)
455
{
456
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
457
    ata_power_down();
458
    mutex_unlock(&ata_mutex);
459
}
460
 
461
void ata_sleepnow(void)
462
{
463
    ata_sleep();
464
}
465
 
466
void ata_close(void)
467
{
468
    ata_sleep();
469
}
470
 
471
void ata_spin(void)
472
{
473
    ata_power_up();
474
}
475
 
476
void ata_get_info(IF_MD2(int drive,) struct storage_info *info)
477
{
478
    (*info).sector_size = SECTOR_SIZE;
328 theseven 479
#ifdef ATA_HAVE_BBT
480
    (*info).num_sectors = ata_virtual_sectors;
481
#else
301 theseven 482
    (*info).num_sectors = ata_total_sectors;
328 theseven 483
#endif
301 theseven 484
    (*info).vendor = "Apple";
485
    (*info).product = "iPod Classic";
486
    (*info).revision = "1.0";
487
}
488
 
489
long ata_last_disk_activity(void)
490
{
491
    return ata_last_activity_value;
492
}
493
 
494
int ata_init(void)
495
{
496
    mutex_init(&ata_mutex);
497
    wakeup_init(&ata_wakeup);
498
    PCON(7) = 0x44444444;
499
    PCON(8) = 0x44444444;
500
    PCON(9) = 0x44444444;
501
    PCON(10) = (PCON(10) & ~0xffff) | 0x4444;
502
    ata_powered = false;
503
    ata_total_sectors = 0;
328 theseven 504
#ifdef ATA_HAVE_BBT
505
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
506
    memset(ata_bbt, 0, sizeof(ata_bbt));
507
    ata_power_up();
508
    uint32_t* buf = (uint32_t*)(ata_bbt[ARRAYLEN(ata_bbt) - 64]);
509
    ata_bbt_read_sectors(0, 1, buf);
510
    if (!memcmp(buf, "emBIbbth", 8))
511
    {
512
        ata_virtual_sectors = buf[0x1fe];
513
        uint32_t count = buf[0x1ff];
514
        if (count > (ATA_BBT_PAGES >> 6))
515
            panicf(PANIC_KILLTHREAD, "ATA: BBT too big!\n");
516
        uint32_t i;
517
        uint32_t cnt;
518
        for (i = 0; i < count; i += cnt)
519
        {
520
            uint32_t phys = buf[0x200 + i];
521
            for (cnt = 1; cnt < count; cnt++)
522
                if (buf[0x200 + i + cnt] != phys + cnt)
523
                    break;
524
            ata_bbt_read_sectors(phys, cnt, ata_bbt[i << 6]);
525
        }
526
    }
527
    else ata_virtual_sectors = ata_total_sectors;
528
    mutex_unlock(&ata_mutex);
529
#endif
301 theseven 530
    thread_create("ATA idle monitor", ata_thread, ata_stack,
531
                  sizeof(ata_stack), USER_THREAD, 1, true);
532
    return 0;
533
}
534
 
535
#ifdef CONFIG_STORAGE_MULTI
536
int ata_num_drives(int first_drive)
537
{
538
    /* We don't care which logical drive number(s) we have been assigned */
539
    (void)first_drive;
540
 
541
    return 1;
542
}
543
#endif
544
 
545
void INT_ATA()
546
{
547
    uint32_t ata_irq = ATA_IRQ;
548
    ATA_IRQ = ata_irq;
549
    if (ata_irq & ATA_IRQ_MASK) wakeup_signal(&ata_wakeup);
550
    ATA_IRQ_MASK = 0;
551
}