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14 theseven 1
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@    Copyright 2010 TheSeven
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@    This file is part of emBIOS.
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@    emBIOS is free software: you can redistribute it and/or
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@    modify it under the terms of the GNU General Public License as
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@    published by the Free Software Foundation, either version 2 of the
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@    License, or (at your option) any later version.
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@    emBIOS is distributed in the hope that it will be useful,
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@    but WITHOUT ANY WARRANTY; without even the implied warranty of
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@    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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@    See the GNU General Public License for more details.
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@
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@    You should have received a copy of the GNU General Public License
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@    along with emBIOS.  If not, see <http://www.gnu.org/licenses/>.
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@
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.section .icode.contextswitch, "ax", %progbits
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.align 2
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.global context_switch
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.type context_switch, %function
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context_switch:
15 theseven 29
	mrs	r1, cpsr
43 theseven 30
	msr	cpsr_c, #0xdf
14 theseven 31
	ldr	r0, =current_thread
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	ldr	r0, [r0]
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	stmia	r0!, {r0-r14}
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	str	lr, [r0], #4
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	str	r1, [r0]
15 theseven 36
	msr	cpsr_c, #0xd2
14 theseven 37
	adr	lr, resume_thread
15 theseven 38
	mov	r0, #-1
14 theseven 39
	b	scheduler_switch
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.size context_switch, .-context_switch
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43 theseven 42
.global syscall_handler
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.type syscall_handler, %function
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syscall_handler:
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	ldr	sp, [lr,#-4]
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	bics	sp, sp, #0xff000000
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	beq	syscall_breakpoint
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	mov	r12, lr
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	mrs	sp, spsr
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	msr	cpsr_c, sp
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	mov	lr, r12
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	ldr	r12, [lr,#-4]
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	bic	r12, r12, #0xff000000
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	cmp	r12, #(swilist_end-swilist_start)/4+1
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	movcs	r0, #0
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	addcc	pc, pc, r12,lsl#2
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	adr	r1, unknown_swi_string
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	mov	r2, r12
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swilist_start:
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	b	panicf
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	b	get_syscall_table
147 theseven 62
	b	__clzsi2
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	b	__aeabi_uidivmod
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	b	__aeabi_idivmod
43 theseven 65
swilist_end:
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syscall_breakpoint:
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	msr	cpsr_c, #0xd3
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	ldr	sp, =current_thread
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	ldr	sp, [sp]
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	stmia	sp!, {r0-r12}
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	mov	r2, lr
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	mrs	r3, spsr
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	mov	r4, #1
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	mov	r5, sp
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	msr	cpsr_c, #0xdf
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	mov	r0, sp
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	mov	r1, lr
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	msr	cpsr_c, #0xd2
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	stmia	r5, {r0-r4}
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	adr	lr, resume_thread
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	mov	r0, #-1
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	b	scheduler_switch
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.size syscall_handler, .-syscall_handler
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14 theseven 86
.global irq_handler
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.type irq_handler, %function
43 theseven 88
was_in_svc_mode:
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	msr	cpsr_c, #0xd3
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	sub	r3, lr, #4
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	mrs	r4, spsr
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	msr	cpsr_c, r5
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	b enter_irqhandler
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14 theseven 95
irq_handler:
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	str	r12, [sp,#-4]
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	ldr	r12, =current_thread
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	ldr	r12, [r12]
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	stmia	r12!, {r0-r11}
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	ldr	r0, [sp,#-4]
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	mrs	r5, cpsr
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	mrs	r4, spsr
43 theseven 103
	msr	cpsr_c, #0xdf
14 theseven 104
	mov	r1, sp
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	mov	r2, lr
43 theseven 106
	and	r3, r4, #0x1f
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	cmp	r3, #0x13
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	beq	was_in_svc_mode
14 theseven 109
	msr	cpsr_c, r5
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	sub	r3, lr, #4
43 theseven 111
enter_irqhandler:
14 theseven 112
	stmia	r12, {r0-r4}
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	bl	irqhandler
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@ fallthrough
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.global resume_thread
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.type resume_thread, %function
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resume_thread:
15 theseven 119
	ldr	lr, =current_thread
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	ldr	lr, [lr]
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	mov	r0, lr
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	ldr	r1, [lr,#0x40]
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	ldr	lr, [lr,#0x3c]
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	msr	spsr_all, r1
43 theseven 125
	msr	cpsr_c, 0xdf
15 theseven 126
	ldmia	r0, {r0-r14}
14 theseven 127
	msr	cpsr_c, #0xd2
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	movs	pc, lr
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.size irq_handler, .-irq_handler
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.size resume_thread, .-resume_thread
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.global enter_critical_section
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.type enter_critical_section, %function
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enter_critical_section:
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	mrs	r0, cpsr
15 theseven 136
	orr	r1, r0, #0xc0
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	msr	cpsr_c, r1
14 theseven 138
	mov	pc, lr
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.size enter_critical_section, .-enter_critical_section
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.global leave_critical_section
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.type leave_critical_section, %function
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leave_critical_section:
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	msr	cpsr_c, r0
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	mov	pc, lr
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.size leave_critical_section, .-leave_critical_section
43 theseven 147
 
127 theseven 148
.global execfirmware
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.type execfirmware, %function
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execfirmware:
140 theseven 151
	str	r0, [sp,#-4]!
219 theseven 152
	bl	interrupt_shutdown
140 theseven 153
	bl	clean_dcache
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	ldr	r1, [sp], #4
127 theseven 155
	msr	cpsr_c, #0xd3
140 theseven 156
	mrc	p15, 0, r0,c1,c0
312 theseven 157
	bic	r0, r0, #5
140 theseven 158
	mcr	p15, 0, r0,c1,c0
312 theseven 159
	mov	r0, #0
140 theseven 160
	mcr	p15, 0, r0,c7,c5
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	bx	r1
127 theseven 162
.size execfirmware, .-execfirmware
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43 theseven 164
unknown_swi_string:
99 theseven 165
	.ascii "Unhandled SWI %06X\0"