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301 theseven 1
/***************************************************************************
2
 *             __________               __   ___.
3
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
4
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
5
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
6
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
7
 *                     \/            \/     \/    \/            \/
8
 * $Id$
9
 *
10
 * Copyright (C) 2007 Dave Chapman
11
 *
12
 * This program is free software; you can redistribute it and/or
13
 * modify it under the terms of the GNU General Public License
14
 * as published by the Free Software Foundation; either version 2
15
 * of the License, or (at your option) any later version.
16
 *
17
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18
 * KIND, either express or implied.
19
 *
20
 ****************************************************************************/
21
#include "global.h"
22
#include "thread.h"
23
#include "disk.h"
24
#include "storage.h"
339 theseven 25
#include "storage_ata-target.h"
301 theseven 26
#include "timer.h"
27
#include "../ipodnano3g/s5l8702.h"
28
 
29
/** static, private data **/ 
30
uint16_t ata_identify_data[0x100];
31
bool ata_lba48;
32
bool ata_dma;
33
uint64_t ata_total_sectors;
34
static struct mutex ata_mutex;
35
static struct wakeup ata_wakeup;
36
static uint32_t ata_dma_flags;
37
static long ata_last_activity_value = -1;
38
static long ata_sleep_timeout = 20000000;
429 theseven 39
static struct scheduler_thread ata_thread_handle;
40
static uint32_t ata_stack[0x80] STACK_ATTR;
301 theseven 41
static bool ata_powered;
42
 
328 theseven 43
#ifdef ATA_HAVE_BBT
44
#include "panic.h"
45
uint16_t ata_bbt[ATA_BBT_PAGES][0x20];
339 theseven 46
uint64_t ata_virtual_sectors;
337 theseven 47
uint32_t ata_last_offset;
48
uint64_t ata_last_phys;
301 theseven 49
 
328 theseven 50
void ata_bbt_read_sectors(uint32_t sector, uint32_t count, void* buffer)
51
{
52
    int rc = ata_rw_sectors_internal(sector, count, buffer, false);
53
    if (IS_ERR(rc))
54
        panicf(PANIC_KILLTHREAD, "ATA: Error %08X while reading BBT (sector %d, count %d)\n",
55
               rc, sector, count);
56
}
57
#endif
58
 
59
 
301 theseven 60
static uint16_t ata_read_cbr(uint32_t volatile* reg)
61
{
317 theseven 62
    while (!(ATA_PIO_READY & 2)) yield();
301 theseven 63
    volatile uint32_t dummy = *reg;
317 theseven 64
    while (!(ATA_PIO_READY & 1)) yield();
301 theseven 65
    return ATA_PIO_RDATA;
66
}
67
 
68
static void ata_write_cbr(uint32_t volatile* reg, uint16_t data)
69
{
317 theseven 70
    while (!(ATA_PIO_READY & 2)) yield();
301 theseven 71
    *reg = data;
72
}
73
 
74
static int ata_wait_for_not_bsy(long timeout)
75
{
76
    long startusec = USEC_TIMER;
77
    while (true)
78
    {
79
        uint8_t csd = ata_read_cbr(&ATA_PIO_CSD);
80
        if (!(csd & BIT(7))) return 0;
81
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(0);
82
    }
83
}
84
 
85
static int ata_wait_for_rdy(long timeout)
86
{
87
    long startusec = USEC_TIMER;
88
    PASS_RC(ata_wait_for_not_bsy(timeout), 1, 0);
89
    while (true)
90
    {
91
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
92
        if (dad & BIT(6)) return 0;
93
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(1);
94
    }
95
}
96
 
97
static int ata_wait_for_start_of_transfer(long timeout)
98
{
99
    long startusec = USEC_TIMER;
100
    PASS_RC(ata_wait_for_not_bsy(timeout), 2, 0);
101
    while (true)
102
    {
103
        uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
104
        if (dad & BIT(0)) RET_ERR(1);
105
        if ((dad & (BIT(7) | BIT(3))) == BIT(3)) return 0;
106
        if (TIMEOUT_EXPIRED(startusec, timeout)) RET_ERR(2);
107
    }
108
}
109
 
110
static int ata_wait_for_end_of_transfer(long timeout)
111
{
112
    PASS_RC(ata_wait_for_not_bsy(timeout), 2, 0);
113
    uint8_t dad = ata_read_cbr(&ATA_PIO_DAD);
114
    if (dad & BIT(0)) RET_ERR(1);
115
    if ((dad & (BIT(3) | BITRANGE(5, 7))) == BIT(6)) return 0;
116
    RET_ERR(2);
117
}    
118
 
119
int ata_identify(uint16_t* buf)
120
{
121
    int i;
122
    PASS_RC(ata_wait_for_not_bsy(10000000), 1, 0);
123
    ata_write_cbr(&ATA_PIO_DVR, 0);
124
    ata_write_cbr(&ATA_PIO_CSD, 0xec);
125
    PASS_RC(ata_wait_for_start_of_transfer(10000000), 1, 1);
126
    for (i = 0; i < 0x100; i++)
127
    {
128
        uint16_t word = ata_read_cbr(&ATA_PIO_DTR);
129
        buf[i] = (word >> 8) | (word << 8);
130
    }
131
}
132
 
133
void ata_set_active(void)
134
{
135
    ata_last_activity_value = USEC_TIMER;
136
}
137
 
317 theseven 138
int ata_set_feature(uint32_t feature, uint32_t param)
139
{
140
    PASS_RC(ata_wait_for_rdy(500000), 1, 0);
141
    ata_write_cbr(&ATA_PIO_DVR, 0);
142
    ata_write_cbr(&ATA_PIO_FED, 3);
143
    ata_write_cbr(&ATA_PIO_SCR, param);
144
    ata_write_cbr(&ATA_PIO_CSD, feature);
145
    PASS_RC(ata_wait_for_rdy(500000), 1, 1);
146
    return 0;
147
}
148
 
301 theseven 149
int ata_power_up()
150
{
151
    ata_set_active();
357 theseven 152
    if (ata_powered) return 0;
301 theseven 153
    i2c_sendbyte(0, 0xe6, 0x1b, 1);
154
    clockgate_enable(5, true);
155
    ATA_CFG = BIT(0);
156
    sleep(1000);
157
    ATA_CFG = 0;
158
    sleep(6000);
159
    ATA_SWRST = BIT(0);
160
    sleep(500);
161
    ATA_SWRST = 0;
162
    sleep(90000);
163
    ATA_CONTROL = BIT(0);
164
    sleep(200000);
165
    ATA_PIO_TIME = 0x191f7;
166
    ATA_PIO_LHR = 0;
167
    while (!(ATA_PIO_READY & BIT(1))) sleep(100);
168
    PASS_RC(ata_identify(ata_identify_data), 2, 0);
169
    uint32_t piotime = 0x11f3;
170
    uint32_t mdmatime = 0x1c175;
171
    uint32_t udmatime = 0x5071152;
172
    uint32_t param = 0;
173
    ata_dma_flags = 0;
174
    ata_lba48 = ata_identify_data[83] & BIT(10) ? true : false;
175
    if (ata_lba48)
176
        ata_total_sectors = ata_identify_data[100]
177
                          | (((uint64_t)ata_identify_data[101]) << 16)
178
                          | (((uint64_t)ata_identify_data[102]) << 32)
179
                          | (((uint64_t)ata_identify_data[103]) << 48);
180
    else ata_total_sectors = ata_identify_data[60] | (((uint32_t)ata_identify_data[61]) << 16);
328 theseven 181
    ata_total_sectors >>= 3;
301 theseven 182
    if (ata_identify_data[53] & BIT(1))
183
    {
184
        if (ata_identify_data[64] & BIT(1)) piotime = 0x2072;
185
        else if (ata_identify_data[64] & BIT(0)) piotime = 0x7083;
186
    }
187
    if (ata_identify_data[63] & BIT(2))
188
    {
189
        mdmatime = 0x5072;
190
        param = 0x22;
191
    }
192
    else if (ata_identify_data[63] & BIT(1))
193
    {
194
        mdmatime = 0x7083;
195
        param = 0x21;
196
    }
197
    if (ata_identify_data[63] & BITRANGE(0, 2))
198
    {
199
        ata_dma_flags = BIT(3) | BIT(10);
200
        param |= 0x20;
201
    }
202
    if (ata_identify_data[53] & BIT(2))
203
    {
204
        if (ata_identify_data[88] & BIT(4))
205
        {
206
            udmatime = 0x2010a52;
207
            param = 0x44;
208
        }
209
        else if (ata_identify_data[88] & BIT(3))
210
        {
211
            udmatime = 0x2020a52;
212
            param = 0x43;
213
        }
214
        else if (ata_identify_data[88] & BIT(2))
215
        {
216
            udmatime = 0x3030a52;
217
            param = 0x42;
218
        }
219
        else if (ata_identify_data[88] & BIT(1))
220
        {
221
            udmatime = 0x3050a52;
222
            param = 0x41;
223
        }
224
        if (ata_identify_data[88] & BITRANGE(0, 4))
225
        {
226
            ata_dma_flags = BIT(2) | BIT(3) | BIT(9) | BIT(10);
227
            param |= 0x40;
228
        }
229
    }
230
    ata_dma = param ? true : false;
317 theseven 231
    PASS_RC(ata_set_feature(0xef, param), 2, 1);
337 theseven 232
    if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(0x02, 0), 2, 2);
233
    if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0x55, 0), 2, 3);
301 theseven 234
    ATA_PIO_TIME = piotime;
235
    ATA_MDMA_TIME = mdmatime;
236
    ATA_UDMA_TIME = udmatime;
237
    ata_powered = true;
238
    ata_set_active();
239
    return 0;
240
}
241
 
242
void ata_power_down()
243
{
357 theseven 244
    if (!ata_powered) return;
301 theseven 245
    ata_powered = false;
246
    ata_wait_for_rdy(1000000);
247
    ata_write_cbr(&ATA_PIO_DVR, 0);
248
    ata_write_cbr(&ATA_PIO_CSD, 0xe0);
249
    ata_wait_for_rdy(1000000);
250
    sleep(30000);
251
    ATA_CONTROL = 0;
317 theseven 252
    while (!(ATA_CONTROL & BIT(1))) yield();
301 theseven 253
    clockgate_enable(5, false);
254
    i2c_sendbyte(0, 0xe6, 0x1b, 0);
255
}
256
 
337 theseven 257
int ata_rw_chunk(uint64_t sector, uint32_t cnt, void* buffer, bool write)
258
{
259
    PASS_RC(ata_wait_for_rdy(100000), 2, 0);
260
    ata_write_cbr(&ATA_PIO_DVR, 0);
261
    if (ata_lba48)
262
    {
263
        ata_write_cbr(&ATA_PIO_SCR, cnt >> 5);
264
        ata_write_cbr(&ATA_PIO_SCR, (cnt << 3) & 0xff);
265
        ata_write_cbr(&ATA_PIO_LHR, (sector >> 37) & 0xff);
266
        ata_write_cbr(&ATA_PIO_LMR, (sector >> 29) & 0xff);
267
        ata_write_cbr(&ATA_PIO_LLR, (sector >> 21) & 0xff);
268
        ata_write_cbr(&ATA_PIO_LHR, (sector >> 13) & 0xff);
269
        ata_write_cbr(&ATA_PIO_LMR, (sector >> 5) & 0xff);
270
        ata_write_cbr(&ATA_PIO_LLR, (sector << 3) & 0xff);
271
        ata_write_cbr(&ATA_PIO_DVR, BIT(6));
272
        if (write) ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0x35 : 0x39);
273
        else ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0x25 : 0x29);
274
    }
275
    else
276
    {
277
        ata_write_cbr(&ATA_PIO_SCR, (cnt << 3) & 0xff);
278
        ata_write_cbr(&ATA_PIO_LHR, (sector >> 13) & 0xff);
279
        ata_write_cbr(&ATA_PIO_LMR, (sector >> 5) & 0xff);
280
        ata_write_cbr(&ATA_PIO_LLR, (sector << 3) & 0xff);
281
        ata_write_cbr(&ATA_PIO_DVR, BIT(6) | ((sector >> 21) & 0xf));
282
        if (write) ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0xca : 0x30);
283
        else ata_write_cbr(&ATA_PIO_CSD, ata_dma ? 0xc8 : 0xc4);
284
    }
285
    if (ata_dma)
286
    {
287
        PASS_RC(ata_wait_for_start_of_transfer(500000), 2, 1);
288
        if (write)
289
        {
290
            ATA_SBUF_START = buffer;
291
            ATA_SBUF_SIZE = SECTOR_SIZE * cnt;
292
            ATA_CFG |= BIT(4);
293
        }
294
        else
295
        {
296
            ATA_TBUF_START = buffer;
297
            ATA_TBUF_SIZE = SECTOR_SIZE * cnt;
298
            ATA_CFG &= ~BIT(4);
299
        }
300
        ATA_XFR_NUM = SECTOR_SIZE * cnt - 1;
301
        ATA_CFG |= ata_dma_flags;
302
        ATA_CFG &= ~(BIT(7) | BIT(8));
303
        wakeup_wait(&ata_wakeup, TIMEOUT_NONE);
304
        ATA_IRQ = BITRANGE(0, 4);
305
        ATA_IRQ_MASK = BIT(0);
306
        ATA_COMMAND = BIT(0);
307
        if (wakeup_wait(&ata_wakeup, 500000) == THREAD_TIMEOUT)
308
        {
309
            ATA_COMMAND = BIT(1);
310
            ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12));
311
            RET_ERR(2);
312
        }
313
        ATA_COMMAND = BIT(1);
314
        ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12));
315
    }
316
    else
317
    {
318
        cnt *= SECTOR_SIZE / 512;
319
        while (cnt--)
320
        {
321
            int i;
322
            PASS_RC(ata_wait_for_start_of_transfer(500000), 2, 1);
323
            if (write)
324
                for (i = 0; i < 256; i++)
325
                    ata_write_cbr(&ATA_PIO_DTR, ((uint16_t*)buffer)[i]);
326
            else
327
                for (i = 0; i < 256; i++)
328
                    ((uint16_t*)buffer)[i] = ata_read_cbr(&ATA_PIO_DTR);
329
            buffer += 512;
330
        }
331
    }
332
    PASS_RC(ata_wait_for_end_of_transfer(100000), 2, 3);
333
    return 0;
334
}
335
 
301 theseven 336
int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool write)
337
{
328 theseven 338
#ifdef ATA_HAVE_BBT
339
    if (sector + count > ata_virtual_sectors) RET_ERR(0);
340
    while (count)
341
    {
337 theseven 342
        uint32_t offset;
328 theseven 343
        uint32_t l0idx = sector >> 15;
344
        uint32_t l0offs = sector & 0x7fff;
345
        uint32_t cnt = MIN(count, 0x8000 - l0offs);
346
        uint32_t l0data = ata_bbt[0][l0idx << 1];
347
        uint32_t base = ata_bbt[0][(l0idx << 1) | 1] << 12;
337 theseven 348
        if (l0data < 0x8000) offset = l0data + base;
328 theseven 349
        else
350
        {
351
            uint32_t l1idx = (sector >> 10) & 0x1f;
352
            uint32_t l1offs = sector & 0x3ff;
353
            cnt = MIN(count, 0x400 - l1offs);
354
            uint32_t l1data = ata_bbt[l0data & 0x7fff][l1idx];
337 theseven 355
            if (l1data < 0x8000) offset = l1data + base;
328 theseven 356
            else
357
            {
358
                uint32_t l2idx = (sector >> 5) & 0x1f;
359
                uint32_t l2offs = sector & 0x1f;
360
                cnt = MIN(count, 0x20 - l2offs);
361
                uint32_t l2data = ata_bbt[l1data & 0x7fff][l2idx];
337 theseven 362
                if (l2data < 0x8000) offset = l2data + base;
328 theseven 363
                else
364
                {
365
                    uint32_t l3idx = sector & 0x1f;
337 theseven 366
                    uint32_t l3data = ata_bbt[l2data & 0x7fff][l3idx];
328 theseven 367
                    for (cnt = 1; cnt < count && l3idx + cnt < 0x20; cnt++)
337 theseven 368
                        if (ata_bbt[l2data & 0x7fff][l3idx + cnt] != l3data)
328 theseven 369
                            break;
337 theseven 370
                    offset = l3data + base;
328 theseven 371
                }
372
            }
373
        }
337 theseven 374
        uint64_t phys = sector + offset;
375
        if (offset != ata_last_offset && phys - ata_last_phys < 64) ata_soft_reset();
376
        ata_last_offset = offset;
377
        ata_last_phys = phys + cnt;
328 theseven 378
        PASS_RC(ata_rw_sectors_internal(phys, cnt, buffer, write), 0, 0);
379
        buffer += cnt * SECTOR_SIZE;
380
        sector += cnt;
381
        count -= cnt;
382
    }
383
    return 0;
384
}
385
 
386
int ata_rw_sectors_internal(uint64_t sector, uint32_t count, void* buffer, bool write)
387
{
388
#endif
301 theseven 389
    if (sector + count > ata_total_sectors) RET_ERR(0);
390
    if (!ata_powered) ata_power_up();
391
    ata_set_active();
392
    if (ata_dma && write) clean_dcache();
393
    else if (ata_dma) invalidate_dcache();
394
    ATA_COMMAND = BIT(1);
395
    while (count)
396
    {
317 theseven 397
        uint32_t cnt = MIN(ata_lba48 ? 8192 : 32, count);
337 theseven 398
        int rc = -1;
399
        int tries = 3;
400
        while (tries-- && rc)
301 theseven 401
        {
337 theseven 402
            rc = ata_rw_chunk(sector, cnt, buffer, write);
403
            if (rc) ata_soft_reset();
301 theseven 404
        }
337 theseven 405
        if (rc)
301 theseven 406
        {
337 theseven 407
            void* buf = buffer;
405 theseven 408
            uint64_t sect;
337 theseven 409
            for (sect = sector; sect < sector + cnt; sect++)
410
            {
411
                rc = -1;
412
                tries = 3;
413
                while (tries-- && rc)
414
                {
415
                    rc = ata_rw_chunk(sect, 1, buf, write);
416
                    if (rc) ata_soft_reset();
417
                }
418
                if (rc) break;
419
                buf += SECTOR_SIZE;
420
            }
301 theseven 421
        }
337 theseven 422
        PASS_RC(rc, 1, 1);
423
        buffer += SECTOR_SIZE * cnt;
301 theseven 424
        sector += cnt;
425
        count -= cnt;
426
    }
427
    ata_set_active();
428
    return 0;
429
}
430
 
431
static void ata_thread(void)
432
{
433
    while (true)
434
    {
435
        mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
436
        if (TIME_AFTER(USEC_TIMER, ata_last_activity_value + ata_sleep_timeout) && ata_powered)
437
            ata_power_down();
438
        mutex_unlock(&ata_mutex);
439
        sleep(1000000);
440
    }
441
}
442
 
443
/* API Functions */
444
int ata_soft_reset()
445
{
446
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
447
    if (!ata_powered) ata_power_up();
448
    ata_set_active();
449
    ata_write_cbr(&ATA_PIO_DAD, BIT(1) | BIT(2));
450
    sleep(10);
451
    ata_write_cbr(&ATA_PIO_DAD, 0);
337 theseven 452
    PASS_RC_MTX(ata_wait_for_rdy(60000000), 0, 0, &ata_mutex);
301 theseven 453
    ata_set_active();
454
    mutex_unlock(&ata_mutex);
455
}
456
 
457
int ata_read_sectors(IF_MD2(int drive,) unsigned long start, int incount,
458
                     void* inbuf)
459
{
460
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
337 theseven 461
    int rc = ata_rw_sectors(start, incount, inbuf, false);
301 theseven 462
    mutex_unlock(&ata_mutex);
463
    return rc;
464
}
465
 
466
int ata_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
467
                      const void* outbuf)
468
{
469
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
337 theseven 470
    int rc = ata_rw_sectors(start, count, (void*)((uint32_t)outbuf), true);
301 theseven 471
    mutex_unlock(&ata_mutex);
472
    return rc;
473
}
474
 
337 theseven 475
void ata_spindown(int seconds)
476
{
477
    ata_sleep_timeout = seconds * 1000000;
478
}
301 theseven 479
 
480
void ata_sleep(void)
481
{
482
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
483
    ata_power_down();
484
    mutex_unlock(&ata_mutex);
485
}
486
 
487
void ata_sleepnow(void)
488
{
489
    ata_sleep();
490
}
491
 
492
void ata_close(void)
493
{
494
    ata_sleep();
495
}
496
 
497
void ata_spin(void)
498
{
499
    ata_power_up();
500
}
501
 
502
void ata_get_info(IF_MD2(int drive,) struct storage_info *info)
503
{
504
    (*info).sector_size = SECTOR_SIZE;
328 theseven 505
#ifdef ATA_HAVE_BBT
506
    (*info).num_sectors = ata_virtual_sectors;
507
#else
301 theseven 508
    (*info).num_sectors = ata_total_sectors;
328 theseven 509
#endif
301 theseven 510
    (*info).vendor = "Apple";
511
    (*info).product = "iPod Classic";
512
    (*info).revision = "1.0";
513
}
514
 
515
long ata_last_disk_activity(void)
516
{
517
    return ata_last_activity_value;
518
}
519
 
520
int ata_init(void)
521
{
522
    mutex_init(&ata_mutex);
523
    wakeup_init(&ata_wakeup);
524
    PCON(7) = 0x44444444;
525
    PCON(8) = 0x44444444;
526
    PCON(9) = 0x44444444;
527
    PCON(10) = (PCON(10) & ~0xffff) | 0x4444;
528
    ata_powered = false;
529
    ata_total_sectors = 0;
328 theseven 530
#ifdef ATA_HAVE_BBT
531
    mutex_lock(&ata_mutex, TIMEOUT_BLOCK);
532
    memset(ata_bbt, 0, sizeof(ata_bbt));
533
    ata_power_up();
534
    uint32_t* buf = (uint32_t*)(ata_bbt[ARRAYLEN(ata_bbt) - 64]);
535
    ata_bbt_read_sectors(0, 1, buf);
536
    if (!memcmp(buf, "emBIbbth", 8))
537
    {
339 theseven 538
        ata_virtual_sectors = (((uint64_t)buf[0x1fd]) << 32) | buf[0x1fc];
328 theseven 539
        uint32_t count = buf[0x1ff];
540
        if (count > (ATA_BBT_PAGES >> 6))
337 theseven 541
            panicf(PANIC_KILLTHREAD, "ATA: BBT too big! (%d pages, limit: %d)\n", count << 6, ATA_BBT_PAGES);
328 theseven 542
        uint32_t i;
543
        uint32_t cnt;
544
        for (i = 0; i < count; i += cnt)
545
        {
546
            uint32_t phys = buf[0x200 + i];
547
            for (cnt = 1; cnt < count; cnt++)
548
                if (buf[0x200 + i + cnt] != phys + cnt)
549
                    break;
550
            ata_bbt_read_sectors(phys, cnt, ata_bbt[i << 6]);
551
        }
552
    }
553
    else ata_virtual_sectors = ata_total_sectors;
554
    mutex_unlock(&ata_mutex);
555
#endif
429 theseven 556
    thread_create(&ata_thread_handle, "ATA idle monitor", ata_thread, ata_stack,
301 theseven 557
                  sizeof(ata_stack), USER_THREAD, 1, true);
558
    return 0;
559
}
560
 
561
#ifdef CONFIG_STORAGE_MULTI
562
int ata_num_drives(int first_drive)
563
{
564
    /* We don't care which logical drive number(s) we have been assigned */
565
    (void)first_drive;
566
 
567
    return 1;
568
}
569
#endif
570
 
571
void INT_ATA()
572
{
573
    uint32_t ata_irq = ATA_IRQ;
574
    ATA_IRQ = ata_irq;
575
    if (ata_irq & ATA_IRQ_MASK) wakeup_signal(&ata_wakeup);
576
    ATA_IRQ_MASK = 0;
577
}